m38039mf-xxxsp Mitsumi Electronics, Corp., m38039mf-xxxsp Datasheet - Page 51

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m38039mf-xxxsp

Manufacturer Part Number
m38039mf-xxxsp
Description
Single-chip 8-bit Cmos Microcomputer
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
(2) Asynchronous Serial I/O (UART) Mode
Clock asynchronous serial I/O mode (UART) can be selected by
clearing the serial I/O1 mode selection bit of the serial I/O1 control
register to “0”.
Eight serial data transfer formats can be selected, and the transfer
formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer, but the
Fig. 42 Block diagram of UART serial I/O1
Fig. 43 Operation of UART serial I/O1
( f ( X
T r a n s m i t o r r e c e i v e c l o c k
C I N
T r a n s m i t b u f f e r w r i t e
) i n l o w - s p e e d m o d e )
R e c e i v e b u f f e r r e a d
S e r i a l o u t p u t T
S e r i a l i n p u t R
N o t e s
P 4
P 4
P4
6
4
5
/ S
/ R
/T
1 : E r r o r f l a g d e t e c t i o n o c c u r s a t t h e s a m e t i m e t h a t t h e R B F f l a g b e c o m e s “ 1 ” ( a t 1 s t s t o p b i t , d u r i n g r e c e p t i o n ) .
2 : A s t h e t r a n s m i t i n t e r r u p t ( T I ) , w h e n e i t h e r t h e T B E o r T S C f l a g b e c o m e s “ 1 , ” c a n b e s e l e c t e d t o o c c u r d e p e n d i n g o n t h e s e t t i n g o f t h e t r a n s m i t
3 : T h e r e c e i v e i n t e r r u p t ( R I ) i s s e t w h e n t h e R B F f l a g b e c o m e s “ 1 . ”
4 : A f t e r d a t a i s w r i t t e n t o t h e t r a n s m i t b u f f e r w h e n T S C = 1 , 0 . 5 t o 1 . 5 c y c l e s o f t h e d a t a s h i f t c y c l e a r e n e c e s s a r y u n t i l c h a n g i n g t o T S C = 0 .
f(X
s i g n a l
s i g n a l
C L K 1
X
X
i n t e r r u p t s o u r c e s e l e c t i o n b i t ( T I C ) o f t h e s e r i a l I / O 1 c o n t r o l r e g i s t e r .
X
X
D
D
IN
D
D
1
1
)
1
1
S T d e t e c t o r
B R G c o u n t s o u r c e s e l e c t i o n b i t
T B E = 0
TSC=0
TBE=1
1 / 4
C h a r a c t e r l e n g t h s e l e c t i o n b i t
S T
C h a r a c t e r l e n g t h s e l e c t i o n b i t
S T
7 bits
8 b i t s
S e r i a l I / O 1 s y n c h r o n o u s c l o c k s e l e c t i o n b i t
D
D
0
O E
0
Address 0018
T B E = 0
D
D
1
1
1 s t a r t b i t
7 o r 8 d a t a b i t
1 o r 0 p a r i t y b i t
1 o r 2 s t o p b i t ( s )
PE F E
Receive buffer register 1
Receive shift register 1
Frequency division ratio 1/(n+1)
ST/SP/PA generator
Data bus
Data bus
16
Baud rate generator
Transmit buffer register 1
Transmit shift register 1
S P d e t e c t o r
Address 001C
Address
two buffers have the same address in a memory. Since the shift
register cannot be written to or read from directly, transmit data is
written to the transmit buffer register, and receive data is read
from the receive buffer register.
The transmit buffer register can also hold the next data to be
transmitted, and the receive buffer register can hold a character
while the next character is being received.
S e r i a l I / O 1 c o n t r o l r e g i s t e r
1/16
R B F = 1
16
SP
S P
T B E = 1
Clock control circuit
0018
16
S T
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
ST
R e c e i v e b u f f e r f u l l f l a g ( R B F )
R e c e i v e i n t e r r u p t r e q u e s t ( R I )
Transmit interrupt source selection bit
Serial I/O1 status register
D
0
D
0
RBF=0
MITSUBISHI MICROCOMPUTERS
A d d r e s s 0 0 1 A
D
D
1
1
1 / 1 6
]
T r a n s m i t b u f f e r e m p t y f l a g ( T B E )
Generated at 2nd bit in 2-stop-bit mode
Transmit shift completion flag (TSC)
3803/3804 Group
UART control register
Transmit interrupt request (TI)
1 6
A d d r e s s
A d d r e s s 0 0 1 B
0 0 1 9
1 6
T S C = 1
SP
R B F = 1
1 6
SP
]
51

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