x40031v14z-bt1 Intersil Corporation, x40031v14z-bt1 Datasheet - Page 17

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x40031v14z-bt1

Manufacturer Part Number
x40031v14z-bt1
Description
Triple Voltage Monitor With Integrated Cpu Supervisor
Manufacturer
Intersil Corporation
Datasheet
D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified)
Notes: (1) The device enters the Active state after any start, and remains active until: 9 clock cycles later if the Device Select Bits in the Slave
EQUIVALENT INPUT CIRCUIT FOR VxMON (x = 1, 2, 3)
CAPACITANCE
Note:
V
V
Symbol
Third Supply Monitor
t
t
RPD2
RPD3
TRIP2
TRIP3
Symbol
C
I
C
V3
OUT
IN
∆V
(2) The device goes into Standby: 200ns after any stop, except those that initiate a high voltage write cycle; t
(3) V
(4) At 25°C, V
(5) See ordering information for standard programming levels. For custom programmed levels, contact factory.
(6) Based on characterization data.
(1) This parameter is not 100% tested.
(6)
(6)
(1)
(5)
(5)
(1)
Address Byte are incorrect; 200ns after a stop ending a read operation; or t
voltage cycle; or 9 clock cycles after any start that is not followed by the correct Device Select Bits in the Slave Address Byte.
IL
V2MON Trip Point Voltage Range
V
V3MON Current
V3MON Trip Point Voltage Range
V
Min. and V
TRIP2
TRIP3
Output Capacitance (SDA, RESET/RESET, LOWLINE,
V2FAIL,V3FAIL, WDO)
Input Capacitance (SCL, WP, MR)
V
CC
to V2FAIL
to V3FAIL
ref
= 3V
IH
Max. are for reference only and are not tested.
Parameter
17
VxMON
Parameter
X40030, X40031, X40034, X40035
R
(Continued)
C
V
REF
Min.
2.85
2.55
2.15
1.25
0.95
1.65
3.05
2.85
1.7
0.9
1.7
t
RPDX
+
= 5µs worst case
Typ.
2.9
2.6
2.2
1.3
1.0
1.7
3.1
2.9
WC
(4)
Output Pin
after a stop ending a write operation.
Max.
8
6
Max.
4.75
2.95
2.65
2.25
1.35
1.05
4.75
1.75
3.15
2.95
3.5
15
5
5
Unit
µA
Unit
µs
µs
V
V
V
V
V
V
V
V
V
V
V
pF
pF
WC
X40030, X40031
X40034, X40035
X40030, X40031-A
X40030, X40031-B
X40030, X40031-C
X40034, X40035-A&B
X40034, X40035-C
X40030, X40031
X40034, X40035-A
X40034, X40035-B&C
after a stop that initiates a high
∆V = 100mV
Test Conditions
Test Conditions
V
V
OUT
IN
= 0V
= 0V
May 25, 2006
FN8114.1

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