ata5724p3c-tkqy ATMEL Corporation, ata5724p3c-tkqy Datasheet - Page 23
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ata5724p3c-tkqy
Manufacturer Part Number
ata5724p3c-tkqy
Description
Uhf Ask/fsk Receiver
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5724P3C-TKQY.pdf
(46 pages)
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10. Digital Noise Suppression
10.1
Figure 10-1. Output of Digital Noise at the End of the Data Stream
Figure 10-2. Automatic Noise Suppression
9248A–RKE–09/11
Automatic Noise Suppression
Data_out (DATA)
Data_out (DATA)
DATA_CLK
DATA_CLK
Bit-check
Bit-check
mode
mode
Bit check ok
Bit check ok
After a data transmission, digital noise appears on the data output (see
Digital Noise at the End of the Data Stream”). To prevent digital noise keeping the connected
microcontroller busy, it can be suppressed in two different ways:
The receiver changes to bit-check mode at the end of a valid data stream if the bit
Noise_Disable
tal noise is suppressed, and the level at pin DATA is high. The receiver changes back to
receiving mode, if the bit check was successful.
This method of noise suppression is recommended if the data stream is Manchester or
Bi-phase coded and is active after power on.
Figure 10-3
the data output at the end of a data stream. If the last period of the data stream is a high period
(rising edge to falling edge), a pulse occurs on pin DATA. The length of the pulse depends on
the selected baud-rate range.
• Automatic Noise Suppression
• Controlled Noise Suppression by the Microcontroller
Preburst
Preburst
data clock control
data clock control
Receiving mode,
Receiving mode,
logic active
logic active
“Occurrence of a Pulse at the End of the Data Stream” illustrates the behavior of
Data
Data
(Table 11-9 on page
Atmel ATA5723C/ATA5724C/ATA5728C
Digital Noise
Receiving mode,
bit check active
Bit-check
mode
27) in the OPMODE register is set to 1 (default). The digi-
Digital Noise
Bit check ok
Bit check ok
Preburst
Preburst
data clock control
data clock control
Receiving mode,
Receiving mode,
logic active
logic active
Data
Data
Figure 10-1
Receiving mode,
bit check active
Digital Noise
Bit-check
mode
“Output of
23