ata5724p3c-tkqy ATMEL Corporation, ata5724p3c-tkqy Datasheet - Page 30
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ata5724p3c-tkqy
Manufacturer Part Number
ata5724p3c-tkqy
Description
Uhf Ask/fsk Receiver
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5724P3C-TKQY.pdf
(46 pages)
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13. Programming the Configuration Register
Figure 13-1. Timing of the Register Programming
Figure 13-2. Data Interface
30
Serial bi-directional
Data_out (DATA)
(microcontroller)
Atmel ATA5723C/ATA5724C/ATA5728C
data line
IC_ACTIVE
Out1
V
Data_in
Data_out
S
= 4.5V to 5.5V
0V/5V
Receiving
X
X
mode
The configuration registers are serially programmed using the bi-directional data line as shown
in
To start programming, the serial data line DATA is pulled to low by the microcontroller for the
time period t1. When DATA has been released, the receiver becomes the master device.
When the programming delay period t2 has elapsed, the receiver emits 15 subsequent syn-
chronization pulses with the pulse length t3. After each of these pulses, a programming
window occurs. The delay until the program window starts is determined by t4, the duration is
defined by t5. The individual bits are set within the programming window. If the microcontroller
pulls down pin DATA for the time period t7 during t5, the corresponding bit is set to “0”. If no
programming pulse t7 is issued, this bit is set to “1”. All 15 bits are programmed this way. The
time frame to program a bit is defined by t6.
Interface
Input
Figure 13-1
t1
ATA5723C
ATA5724C
ATA5728C
0V to 20V
t2
and
I
D
t3
Figure
(Start bit)
Bit 1
t4
("0")
DATA
t5
t6
t7
13-2.
Serial bi-directional data line
(Register
V
R
C
select)
Programming frame
X
pup
L
Bit 2
("1")
= 5V to 20V
I/O
(Poll 8)
Bit 14
("0")
Microcontroller
(Stop bit)
Bit 15
Out1 (microcontroller)
("0")
t8
t9
T
Sleep
mode
Sleep
9248A–RKE–09/11
Start-up
T
mode
Start-up