ata5724p3c-tkqy ATMEL Corporation, ata5724p3c-tkqy Datasheet - Page 29
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ata5724p3c-tkqy
Manufacturer Part Number
ata5724p3c-tkqy
Description
Uhf Ask/fsk Receiver
Manufacturer
ATMEL Corporation
Datasheet
1.ATA5724P3C-TKQY.pdf
(46 pages)
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12. Conservation of the Register Information
Figure 12-1. Generation of the Power-on Reset
9248A–RKE–09/11
Data_out (DATA)
POR
V
S
X
The Atmel
tion circuitry as a mechanism to preserve the RAM register information.
According to
below the threshold voltage V
uration registers in that condition. The POR is cancelled after the minimum reset period t
when V
turned on.
To indicate that condition, the receiver displays a reset marker (RM) at pin DATA after a reset.
The RM is represented by the fixed frequency f
using a low pulse t1 at pin DATA. The RM has the following characteristics:
Using this conservation mechanism, the receiver cannot lose its register information without
communicating this condition using the reset marker RM.
• f
• If the receiver is set back to polling mode using pin DATA, RM cannot be cancelled
misinterpreted by the connected microcontroller.
accidentally if t1 is applied as described in the proposal in
Configuration Register” on page
RM
is lower than the lowest feasible frequency of a data signal. Due to this, RM cannot be
S
t
exceeds V
Rst
®
ATA5723C/ATA5724C uses an integrated power-on reset and brown-out detec-
Figure
Atmel ATA5723C/ATA5724C/ATA5728C
ThReset
12-1, a power-on reset (POR) is generated if the supply voltage V
. A POR is also generated when the supply voltage of the receiver is
V
Threset
ThReset
. The default parameters are programmed into the config-
30.
RM
at a 50% duty-cycle. RM can be cancelled
1/f
RM
Section 13. “Programming the
S
drops
29
Rst