ak5358a AKM Semiconductor, Inc., ak5358a Datasheet - Page 8

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ak5358a

Manufacturer Part Number
ak5358a
Description
96khz 24-bit ?? Adc
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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Note 12. SCLK rising edge must not occur at the same time as LRCK edge.
Note 13. The AK5358A can be reset by bringing the PDN pin = “L”.
Note 14. This cycle is the number of LRCK rising edges from the PDN pin = “H”.
MS0511-E-02
(Ta=-20°C ∼ 85°C; VA=4.5 ∼ 5.5V; VD=2.7 ∼ 5.5V; C
Parameter
Master Clock Timing
LRCK Frequency
Audio Interface Timing
Reset Timing
512fs, 256fs Frequency
768fs, 384fs Frequency
PDN Pulse Width
PDN “↑” to SDTO valid at Slave Mode
PDN “↑” to SDTO valid at Master Mode
Slave mode
SCLK Period
SCLK Pulse Width Low
LRCK Edge to SCLK “↑”
SCLK “↑” to LRCK Edge
LRCK to SDTO (MSB) (Except I
SCLK “↓” to SDTO
Master mode
SCLK Frequency
SCLK Duty
SCLK “↓” to LRCK
SCLK “↓” to SDTO
Duty Cycle
Pulse Width Low
Pulse Width High
Pulse Width Low
Pulse Width High
Pulse Width High
Slave mode
Master mode
SWITCHING CHARACTERISTICS
2
S mode)
(Note
(Note
(
(Note
(Note
Note
12)
12)
13)
14)
14)
L
=20pF)
- 8 -
Symbol
tCLKH
tCLKH
tSCKH
tMSLR
tCLKL
tCLKL
tSCKL
tLRSH
tSHLR
dSCK
fCLK
fCLK
fSCK
tPDV
tPDV
tSCK
tLRS
tSSD
tSSD
tPD
fs
2.048
3.072
10.5
10.5
min
160
−20
−20
150
16
16
45
65
65
30
30
8
4132
4129
64fs
typ
50
50
24.576
36.864
max
96
55
35
35
20
35
[AK5358A]
2008/01
Units
MHz
MHz
kHz
1/fs
1/fs
Hz
ns
ns
ns
ns
%
%
ns
ns
ns
ns
ns
ns
ns
%
ns
ns
ns

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