ak5351 AKM Semiconductor, Inc., ak5351 Datasheet - Page 13

• Manufacturer Part Number: ak5351
• Description: Enhanced Dual Bit 20bit Adc
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK5351 has to be reset once by bringing PD "L" upon power-up. All internal registers of the digital filter
and so on in the AK5351 are reset by this operation. When exiting the power-down mode(PD="H"), the internal
timing starts clocking by first MCLK " "(rising edge). In master mode internal counter starts at once, in slave
mode internal counter starts after synchronizing with the first rising edge of LRCK. The serial output data is
available after 516 counting clock of LRCK cycle.
In slave mode, if the phase difference between LRCK and internal control signals is larger than +1/16~-1/16 of
word period(1/fs), the synchronization of internal control signals with LRCK is done automatically at the first
rising edge of LRCK.
The AK5351 has a Digital High Pass Filter(HPF) for DC-offset cancel. When HPFE pin goes "H", HPF is
enabled. The cut-off frequency of the HPF is 1Hz(@fs=48kHz). It also scales with the sampling frequency(fs).
The HPF can be disabled by bringing HPFE pin "L". In this case, the AK5351 has the DC-offset of a few mV.
0166-E-00
Power-down mode
Asynchronization-reset
High Pass Filter(HPFE pin)
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[AK5351]
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