ak5384 AKM Semiconductor, Inc., ak5384 Datasheet
ak5384
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ak5384 Summary of contents
Page 1
... The AK5384 is a 4-channel A/D Converter with wide sampling rate of 8kHz Multi-channel audio system. The AK5384 achieves high accuracy and low cost by using Enhanced dual bit techniques. The AK5384 supports master mode and TDM format. Therefore, the AK5384 is suitable for multi-channel audio system. ...
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... LIN2+ 1 LIN2- 2 RIN2+ 3 RIN2- 4 TEST 5 VCOM 6 AVSS 7 AVDD 8 DIF 9 TDM1 10 TDM0 11 TDMIN 12 MCLK 13 OVF 14 MS0225-E-00 40 +85 C 28pin VSOP (0.65mm pitch) Evaluation Board for AK5384 Top View - 2 - LIN1+ 28 LIN1- 27 RIN1+ 26 RIN1- 25 M/S 24 CKS 23 PDN 22 DVSS 21 DVDD 20 TVDD 19 SDTO1 18 SDTO2 17 BICK 16 LRCK 15 2003/05 ...
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... Digital Ground Pin Power-Down Mode Pin 22 PDN I When “L”, the circuit is in power-down mode. The AK5384 should always be reset upon power-up. Master Clock Select Pin 23 CKS I “L” : 256fs, “H” : 512fs This pin is enabled in Master Mode. Master / Slave Mode Pin ...
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DVSS=0V; Note 1) Parameter Power Supplies: Analog Digital Output buffer |AVSS – DVSS| Input Current, Any Pin Except Supplies Analog Input Voltage Digital Input Voltage (Except BICK, LRCK pins) (BICK, LRCK pins) Ambient Temperature (Powered applied) Storage Temperature Note ...
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... Note 6. AVDD=28mA; DVDD=15mA@48kHz&5V, DVDD=26mA@96kHz&5V(typ). Note 7. All digital input pins are fixed to DVDD or DVSS. MS0225-E-00 ANALOG CHARACTERISTICS min 88 82 100 94 100 94 90 (Note 4) 2 (Note 5) (Note 6) (Note 6) (Note 7) AVDD [AK5384] typ max Units 24 Bits 100 107 dB 102 dB 107 dB 102 dB 110 dB 0.1 0.5 ...
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... 43.536 - 44.0 - 48 2.0 5.8 13.0 DC CHARACTERISTICS Symbol min VIH 2.2 VIL - VIH 2.7 VIL - VOH TVDD-0.5 VOL - Iin - - 6 - [AK5384] max Units 21.5 kHz - kHz - kHz - kHz kHz 0.005 max Units 43.0 kHz - kHz - kHz - kHz kHz 0.005 typ ...
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... Duty tLRH 1/256fs tLRL 1/256fs fs 8 tLRH 1/128fs tLRL 1/128fs fs 8 Duty fs 8 (Note 10) tLRH fs 8 (Note 10) tLRH - 7 - [AK5384] typ max Units 12.288 24.576 MHz ns ns 18.432 36.864 MHz ns ns 24.576 24.576 MHz ns ns 36.864 36.864 MHz kHz 55 % ...
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... Note 12. SDTO2 output is fixed to “L”. Note 13. This value is MCLK=512fs. Duty cycle is not guaranteed when MCLK=256fs/384fs. Note 14. The AK5384 can be reset by bringing the PDN pin = “L”. Note 15. This cycle is the number of LRCK rising edges from the PDN pin = “H”. ...
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... MS0225-E-00 1/fCLK tCLKH tCLKL 1/fs tBCK tBCKH tBCKL Clock Timing (TDM0 pin = “L”) 1/fCLK tCLKH tCLKL 1/fs tLRH tLRL tBCK tBCKH tBCKL Clock Timing (TDM0 pin = “H” [AK5384] VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL 2003/05 ...
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... Audio Interface Timing (Slave mode, TDM0 pin = “L”) LRCK tBLR BICK SDTO Audio Interface Timing (Slave mode, TDM0 pin = “H”) Note: SDTO shows SDTO1 and SDTO2. MS0225-E-00 tLRB tBSD tLRB tBSD - 10 - [AK5384] VIH VIL VIH VIL 50%TVDD VIH VIL VIH VIL 50%TVDD 2003/05 ...
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LRCK tMBLR BICK SDTO PDN SDTO PDN Note: SDTO shows SDTO1 and SDTO2. MS0225-E-00 dBCK tBSD Audio Interface Timing (Master mode) tPDV tPD Power Down & Reset Timing - 11 - 50%TVDD 50%TVDD 50%TVDD VIH VIL 50%TVDD VIL 2003/05 ...
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... This is because the device utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK5384 should be in the power-down mode (PDN pin = “L”). After exiting reset at power-up etc., the AK5384 is in the power-down mode until MCLK and LRCK are input. In master mode, the master clock (MCLK) must be provided unless PDN pin = “ ...
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... Lch Data 2 S Compatible) 256 BICK BICK 32 BICK 32 BICK - 13 - [AK5384] LRCK BICK I/O I/O H/L I 48-128fs I L/H I 48-128fs I H/L O 64fs O L/H O 64fs O I 256fs I I 256fs I O 256fs O O 256fs O I ...
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... Master Mode and Slave Mode The M/S pin selects either master or slave mode. M/S pin = “H” selects master mode and “L” selects slave mode. The AK5384 outputs BICK and LRCK in master mode. In slave mode, MCLK, BICK and LRCK are input externally. M/S pin ...
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... Power down The AK5384 is placed in the power-down mode by bringing PDN pin “L” and the digital filter is also reset at the same time. This reset should always be done after power-up. In the power-down mode, the VCOM are AVSS level. An analog initialization cycle starts after exiting the power-down mode. Therefore, the output data SDTO1/2 becomes available after 516 cycles of LRCK clock. During initialization, the ADC digital data outputs of both channels are forced to a 2’ ...
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... Cascade TDM Mode The AK5384 supports cascading two devices in a daisy chain configuration at TDM256 mode. In this mode, SDTO2 pin of device #1 is connected to TDMIN pin of device #2. SDTO1 pin of device #2 can output 8ch TDM data multiplexed with 4ch TDM data of device #1 and 4ch TDM data of device #2. Figure 8 shows a connection example of a daisy chain ...
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... TDMIN 13 MCLK 14 OVF Note: - AVSS and DVSS of the AK5384 should be distributed separately from the ground of external digital devices (MPU, DSP etc.). - All digital input pins should not be left floating. Figure 10. Typical Connection Diagram (Normal mode) MS0225-E-00 SYSTEM DESIGN 1 LIN2+ ...
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... LIN(RIN)+ and LIN(RIN) scales with the supply voltage and nominally 0.58 x AVDD. The AK5384 can accept input voltages from AVSS to AVDD. The ADC output data format 2’s compliment. The internal HPF removes the DC offset. The AK5384 samples the analog inputs at 64fs. The digital filter rejects noise above the stop band except for multiples of 64fs. MS0225-E-00 ...
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... ASAHI KASEI 4. External Analog Inputs Circuit Figure 11 shows an input buffer circuit example 1. The input level of this circuit is 5.7Vpp (AK5384: typ. 2.9Vpp). Analog In 5.7Vpp 10k 22 VA Bias 10k 0.1 10 Bias 10k Figure 11. Input buffer circuit example 1 (DC coupled single-end input) Figure 12 shows an input buffer circuit example 2. The input level of this circuit is 5.7Vpp (AK5384: typ. 2.9Vpp). ...
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... ASAHI KASEI 28pin VSOP (Unit: mm) *9.8 0.2 0.675 28 1 0.22 0.1 Seating Plane NOTE: Dimension "*" does not include mold flash. n Material & Lead finish Package molding compound: Lead frame material: Lead frame surface treatment: MS0225-E-00 PACKAGE 0.65 Detail A | 0.10 Epoxy Cu Solder (Pb free) plate - 20 - [AK5384] 1.25 0.2 +0.1 0.15-0.05 0.1 0.1 0-10 2003/05 ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0225-E-00 MARKING AKM AK5384VF XXXBYYYYC XXXBYYYYC Date code identifier IMPORTANT NOTICE - 21 - ...