ft232hq Future Technology Devices International Ltd., ft232hq Datasheet - Page 36

• Manufacturer Part Number: ft232hq
• Description: Ft232h Single Channel Hi- Speed Usb To Multipurpose Uart/fifo Ic
• Manufacturer: Future Technology Devices International Ltd.

4.7 Synchronous and Asynchronous Bit-Bang Interface Mode
The FT232H can be configured as a bit-bang interface. There are two types of bit-bang modes:
synchronous and asynchronous.
See application note
using both Synchronous and Asynchronous bit-bang modes.
4.7.1
Asynchronous Bit-Bang mode is the same as BM-style Bit-Bang mode, except that the internal RD# and
WR strobes (RDSTB# and WRSTB#) are now brought out of the device to allow external logic to be
clocked by accesses to the bit-bang IO bus.
Any data written to the device in the normal manner will be self clocked onto the data pins (those which
have been configured as outputs). Each pin can be independently set as an input or an output. The rate
that the data is clocked out at is controlled by the baud rate generator.
New data must be written, and the baud rate clock should tick to change the data. If no new data is
written to the chip, the pins configured for output will hold the last value written.
Asynchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command with a hex value of
0x01.
4.7.2
The synchronous Bit-Bang mode will only update the output parallel port pins whenever data is sent from
the USB interface to the parallel interface. When this is done, the WRSTB# will activate to indicate that
the data has been read from the USB Rx FIFO buffer and written out on the pins. Data can only be
received from the parallel pins (to the USB Tx FIFO interface) after the parallel interface has been written
to.
With Synchronous Bit-Bang mode data will only be sent out by the FT232H if there is space in the
FT232H USB TXFIFO for data to be read from the parallel interface pins. This Synchronous Bit-Bang mode
will read the data bus parallel I/O pins first, before it transmits data from the USB RxFIFO. It is therefore
1 byte behind the output, and so to read the inputs for the byte that you have just sent, another byte
must be sent.
For example:
(1) Pins start at 0xFF
Send 0x55, 0xAA
Pins go to 0x55 and then to 0xAA
Data read = 0xFF,0x55
(2) Pins start at 0xFF
Send 0x55, 0xAA, 0xAA
(repeat the last byte sent)
Pins go to 0x55 and then to 0xAA
Data read = 0xFF, 0x55, 0xAA
Synchronous Bit-Bang Mode differs from Asynchronous Bit-Bang mode in that the device parallel output
is only read when the parallel output is written to by the USB interface. This makes it easier for the
controlling program to measure the response to a USB output stimulus as the data returned to the USB
interface is synchronous to the output data.
Synchronous Bit-Bang mode is enabled using Set Bit Bang Mode driver command with a hex value of
0x04.
An example of the synchronous bit-bang mode timing is shown in Figure 4.12
Asynchronous Bit-Bang Mode
Synchronous Bit-Bang Mode
AN2232-02 Bit Mode Functions for the FT232
Copyright © 2011 Future Technology Devices International Limited
FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC
for more details and examples of
Document No.: FT_000288
Clearance No.: FTDI #199
Datasheet Version 1.0
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