xr16m752im48 Exar Corporation, xr16m752im48 Datasheet - Page 20
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xr16m752im48
Manufacturer Part Number
xr16m752im48
Description
Xr68m752 -high Performance Duart With 64-byte Fifo
Manufacturer
Exar Corporation
Datasheet
1.XR16M752IM48.pdf
(51 pages)
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XR16M752/XR68M752
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.0.2
If the address lines, data bus lines, IOW#, IOR#, CSA#, CSB#, and modem input lines remain steady when the
M752 is in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on
page
38. If the input lines are floating or are toggling while the M752 is in sleep mode, the
current can be up to 100 times more. If any of those signals are toggling or floating, then an external buffer
would be required to keep the address, data and control lines steady to achieve the low current. As an
alternative, please refer to the XR16L2751 which is pin-to-pin and software compatible with the M752 but with
(some additional pins and) the PowerSave feature that eliminates any unnecessary external buffer.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. Also, it is important to keep
RX A/B inputs idling HIGH or “marking” condition during sleep mode to avoid receiving a “break” condition
upon the restart. This may occur when the external interface transceivers (RS-232, RS-485 or another type)
are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the designer can use a
47k-100k ohm pull-up resistor on the RXA and RXB pins.
2.19
Internal Loopback
The M752 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 12
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held while the CTS#, DSR# CD# and RI# inputs are ignored.
Caution: the RX input pin must be held HIGH during loopback test else upon exiting the loopback test the
UART may detect and report a false “break” signal. Also, Auto RTS/CTS flow control is not supported during
internal loopback.
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