wm8976gefl-v Wolfson Microelectronics plc, wm8976gefl-v Datasheet - Page 18
wm8976gefl-v
Manufacturer Part Number
wm8976gefl-v
Description
Stereo Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8976GEFL-V.pdf
(111 pages)
- Current page: 18 of 111
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WM8976
INTERNAL POWER ON RESET CIRCUIT
Figure 8 Typical Power up Sequence where AVDD is Powered before DVDD
w
Figure 7 Internal Power on Reset Circuit Schematic
The WM8980 includes an internal Power-On-Reset Circuit, as shown in Figure 7, which is used reset
the digital logic into a default state after power up. The POR circuit is powered from AVDD and
monitors DVDD. It asserts PORB low if AVDD or DVDD is below a minimum threshold.
the minimum threshold, V
low and the chip is held in reset. In this condition, all writes to the control interface are ignored. Now
AVDD is at full supply level. Next DVDD rises to V
are in their default state and writes to the control interface may take place.
On power down, where AVDD falls first, PORB is asserted low whenever AVDD drops below the
minimum threshold V
Figure 8 shows a typical power-up sequence where AVDD comes up first. When AVDD goes above
pora_off
pora
.
, there is enough voltage for the circuit to guarantee PORB is asserted
pord_on
and PORB is released high and all registers
PD Rev 4.4 July 2009
Production Data
18
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