wm8595 Wolfson Microelectronics plc, wm8595 Datasheet - Page 67
wm8595
Manufacturer Part Number
wm8595
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8595.pdf
(81 pages)
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Production Data
R36 (24h) – PGA Control Register 3 (PGA_CTRL)
Figure 48 R36 – PGA Control Register
w
Default
Default
Write
Write
Read
Read
Bit #
Bit #
PGA_SEL[2:0]
PGA_UPD
Function
N/A
N/A
15
0
7
0
0
0
PGA Ramp Control Clock Source
000 = LRCLK1
001 = LRCLK2
010 to 110 = Reserved
111 = ADCLRCLK (when ADC is being used in master mode)
PGA Ramp Control Clock Source Mux Update
0 = Do not update PGA clock source
1 = Update clock source
N/A
N/A
14
0
0
6
0
0
N/A
N/A
13
0
0
5
0
0
N/A
N/A
12
0
0
4
0
0
Description
N/A
11
0
3
0
0
N/A = Not Applicable (no function implemented)
PGA_SEL[2:0]
PGA_UPD
10
0
2
0
N/A
PD, Rev 4.1, April 2010
9
0
0
1
1
WM8595
N/A
N/A
8
0
0
0
0
0
67
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