wm8351 Wolfson Microelectronics plc, wm8351 Datasheet - Page 201

• Manufacturer Part Number: wm8351
• Description: Wolfson Audioplus? Stereo Codec With Power Management
• Manufacturer: Wolfson Microelectronics plc

Production Data
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24.3.3
The first-level CS_INT interrupt comprises one second-level interrupt for the Current Sink functions.
This status bit is in Register R26 and its mask bit is in Register R34, as defined in Table 144.
R26 (1Ah)
Interrupt Status
2
R34 (22h)
Interrupt Status
2 Mask
Table 144 Current Sink Interrupts
24.3.4
The first-level EXT_INT interrupt comprises three second-level interrupts for USB, Wall and Battery
supply status. Each of these has a status bit in Register R31 and a mask bit in Register R37, as
defined in Table 145. These flags are triggered on the rising and falling edges of the interrupt events.
R31 (1Fh)
Comparator
Interrupt Status
R39 (27h)
Comparator
Interrupt Status
Mask
Table 145 External Interrupts
24.3.5
The first-level CODEC_INT interrupt comprises four second-level interrupts for the CODEC. Each of
these has a status bit in Register R31 and a mask bit in Register R39, as defined in Table 146.
These flags are triggered on the rising and falling edges of the interrupt events.
ADDRESS
ADDRESS
CURRENT SINK (LED DRIVER) INTERRUPTS
EXTERNAL INTERRUPTS
CODEC INTERRUPTS
15:13
BIT
BIT
15
14
13
13
13
EXT_USB_FB_EINT
EXT_WALL_FB_EINT
EXT_BATT_FB_EINT
“IM_” + name of respective bit
in R31
CS1_EINT
IM_CS1_EINT
LABEL
LABEL
Flag to indicate drain voltage can no
longer be regulated and output current
may be out of spec.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
When IM_CS1_EINT is set to 1, then
CS1_EINT in R26 does not trigger a
CS_INT interrupt when set. The default
value is 0 (unmasked).
USB_FB changed interrupt.
(Rising and Falling Edge triggered)
Note: This bit is cleared once read.
WALL_FB changed interrupt.
(Rising and Falling Edge triggered)
Note: This bit is cleared once read.
BATT_FB changed interrupt.
(Rising and Falling Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R39 enables or masks the
corresponding bit in R31. The default
value for these bits is 0 (unmasked).
DESCRIPTION
DESCRIPTION
PD, June 2009, Rev 4.1
WM8351
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