74AUP1G04GW,125 NXP Semiconductors, 74AUP1G04GW,125 Datasheet

IC INVERTER LP 5-TSSOP

74AUP1G04GW,125

Manufacturer Part Number
74AUP1G04GW,125
Description
IC INVERTER LP 5-TSSOP
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G04GW,125

Number Of Circuits
1
Logic Type
Inverter
Package / Case
SC-70-5, SC-88A, SOT-323-5, SOT-353, 5-TSSOP
Number Of Inputs
1
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2549-2
935279003125

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AUP1G04GW,125
Manufacturer:
NXP Semiconductors
Quantity:
1 900
1. General description
2. Features and benefits
The 74AUP1G04 provides the single inverting buffer.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial Power-down applications using I
The I
the device when it is powered down.
CC
74AUP1G04
Low-power inverter
Rev. 4 — 30 June 2010
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78B Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C
OFF
range from 0.8 V to 3.6 V.
OFF
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
circuitry provides partial Power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
CC
range from 0.8 V to 3.6 V.
CC
= 0.9 μA (maximum)
CC
Product data sheet
OFF
.

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74AUP1G04GW,125 Summary of contents

Page 1

Low-power inverter Rev. 4 — 30 June 2010 1. General description The 74AUP1G04 provides the single inverting buffer. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire V ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74AUP1G04GV −40 °C to +125 °C 74AUP1G04GW −40 °C to +125 °C 74AUP1G04GM −40 °C to +125 °C 74AUP1G04GF −40 °C to +125 °C 74AUP1G04GN −40 °C to +125 °C 74AUP1G04GS 4 ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP1G04 GND 001aaf022 Fig 4. Pin configuration SOT353-1 and SOT753 6.2 Pin description Table 3. Pin description Symbol Pin SOT353-1, SOT753 n. GND n. Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74AUP1G04 Product data sheet 74AUP1G04 n ...

Page 4

... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

Page 5

... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 25 °C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF Δ ...

Page 6

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = −40 °C to +85 °C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF Δ ...

Page 7

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = −40 °C to +125 °C T amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF Δ ...

Page 8

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter = 25 ° amb L t propagation delay ° amb L t propagation delay ° amb L t propagation delay ° amb L t propagation delay pd 74AUP1G04 Product data sheet ...

Page 9

... NXP Semiconductors Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter = 25 °C T amb C power dissipation capacitance MHz [1] All typical values are measured at nominal V [ the same as t and PLH PHL [ used to determine the dynamic power dissipation (P PD × ...

Page 10

... NXP Semiconductors Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter propagation delay propagation delay pd [ the same as t and PLH PHL 12. Waveforms Measurement points are given in Logic levels: V and Fig 7. The data input (A) to output (Y) propagation delays Table 10 ...

Page 11

... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 8. Load circuitry for switching times Table 11. ...

Page 12

... NXP Semiconductors 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1. DIMENSIONS (mm are the original dimensions UNIT max. 0.1 1.0 mm 1.1 0.15 0 0.8 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION IEC SOT353-1 Fig 9 ...

Page 13

... NXP Semiconductors Plastic surface-mounted package; 5 leads DIMENSIONS (mm are the original dimensions) UNIT 0.100 1.1 0.40 0.26 mm 0.013 0.9 0.25 0.10 OUTLINE VERSION IEC SOT753 Fig 10. Package outline SOT753 (SC-74A) 74AUP1G04 Product data sheet scale 3.1 1.7 3.0 0.6 0.95 2.7 1.3 2 ...

Page 14

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 15

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 12 ...

Page 16

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 17

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 18

... NXP Semiconductors 14. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 13. Revision history Document ID Release date 74AUP1G04 v.4 20100630 • Modifications: Added type number 74AUP1G04GN (SOT1115/XSON6 package). ...

Page 19

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 20

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AUP1G04 Product data sheet 16 ...

Page 21

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Package outline ...

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