adum3210 Analog Devices, Inc., adum3210 Datasheet - Page 15

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adum3210

Manufacturer Part Number
adum3210
Description
Dual-channel Digital Isolator, Enhanced System-level Esd Reliability
Manufacturer
Analog Devices, Inc.
Datasheet

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APPLICATIONS INFORMATION
PC BOARD LAYOUT
The ADuM3210 digital isolator requires no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins.
The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
SYSTEM-LEVEL ESD CONSIDERATIONS AND
ENHANCEMENTS
System-level ESD reliability (for example, per IEC 61000-4-x)
is highly dependent on system design, which varies widely by
application. The ADuM3210 incorporates many enhancements
to make ESD reliability less dependent on system design. The
enhancements include:
While the ADuM3210 improves system-level ESD reliability,
it is no substitute for a robust system-level design. For detailed
recommendations on board layout and system-level design, see
AN-793 Application Note, ESD/Latch-Up Considerations with
iCoupler Isolation Products.
ESD protection cells added to all input/output interfaces.
Key metal trace resistances reduced using wider geometry
and paralleling of lines with vias.
The SCR effect inherent in CMOS devices minimized by
use of guarding and isolation technique between PMOS
and NMOS devices.
Areas of high electric field concentration eliminated using
45° corners on metal traces.
Supply pin overvoltage prevented with larger ESD clamps
between each supply pin and its respective ground.
Rev. A | Page 15 of 20
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation delay
to a logic high output.
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately the input signal timing is preserved.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM3210 component.
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM3210
components operating under the same conditions.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions of more than 2 μs at the input, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than about 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case, the
isolator output is forced to a default state (see Table 13) by the
watchdog timer circuit.
The ADuM3210 is immune to external magnetic fields. The
limitation on the ADuM3210 magnetic field immunity is set
by the condition in which induced voltage in the transformer
receiving coil is sufficiently large to either falsely set or reset
the decoder. The following analysis defines the conditions
under which this can occur. The 3 V operating condition of
the ADuM3210 is examined because it represents the most
susceptible mode of operation.
INPUT (V
OUTPUT (V
Ix
)
Ox
)
Figure 9. Propagation Delay Parameters
t
PLH
t
PHL
50%
ADuM3210
50%

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