adum3210 Analog Devices, Inc., adum3210 Datasheet - Page 8

• Manufacturer Part Number: adum3210
• Description: Dual-channel Digital Isolator, Enhanced System-level Esd Reliability
• Manufacturer: Analog Devices, Inc.

ADuM3210
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OR 3 V/5 V, 125°C OPERATION
All voltages are relative to their respective ground. 5 V/3 V operation: 4.5 V ≤ V
3.0 V ≤ V
unless otherwise noted. All typical specifications are at T
Table 5.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
Input Supply Current, per Channel, Quiescent
ADuM3210TR, Total Supply Current, Two Channels
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Output Rise/Fall Time (10% to 90%)
Output Supply Current, per Channel, Quiescent
5 V/3 V Operation
3 V/5 V Operation
Change vs. Temperature
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
DC to 2 Mbps
10 Mbps
V
V
V
V
DD1
DD2
DD1
DD2
DD1
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
Supply Current
Supply Current
Supply Current
Supply Current
≤ 3.6 V, 4.5 V ≤ V
4
3
2
5
PLH
− t
PHL
6
DD2
|
4
≤ 5.5 V. All minimum/maximum specifications apply over the entire recommended operating range,
1
Symbol
I
I
I
I
I
I
I
V
V
V
V
PW
t
PWD
t
t
t
DDI (Q)
DDO (Q)
DD1 (Q)
DD2 (Q)
DD1 (10)
DD2 (10)
IA
PHL
PSK
PSKCD
R
IH
IL
OAH
OAL
/t
, I
, t
F
IB
, V
, V
PLH
OBL
OBH
A
= 25°C; V
Rev. A | Page 8 of 20
Min
−10
0.7 × (V
or V
0.8
0.4
(V
V
(V
V
10
15
DD2
DD2
DD1
DD1
DD2
) − 0.1
) − 0.5
or
or
)
DD1
DD1
= 3.0 V, V
Typ
0.4
0.3
0.3
0.5
1.3
0.8
0.7
1.0
3.5
2.0
1.1
1.7
+0.01
(V
V
V
V
0.0
0.04
0.2
5
3.0
2.5
DD2
DD1
DD2
DD1
,
)
− 0.2
or
DD1
DD2
≤ 5.5 V, 3.0 V ≤ V
= 5.0 V; or V
Max
0.8
0.5
0.5
0.6
1.7
1.3
1.0
1.6
4.6
3.2
1.7
2.8
+10
0.3 × (V
or V
0.1
0.1
0.4
100
55
3
22
3
DD2
)
DD1
DD1
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
V
V
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
DD2
= 5.0 V, V
≤ 3.6 V. 3 V/5 V operation:
DD2
Test Conditions
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
0 ≤ V
I
I
I
I
I
C
C
C
C
C
C
C
C
C
Ox
Ox
Ox
Ox
Ox
L
L
L
L
L
L
L
L
L
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 3.0 V.
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 400 μA, V
= 4 mA, V
IA
, V
IB
≤ V
Ix
Ix
DD1
Ix
= V
Ix
Ix
= V
= V
= V
= V
or V
IxL
IxL
IxH
IxL
IxH
DD2