ox16pci954 ETC-unknow, ox16pci954 Datasheet - Page 34

• Manufacturer Part Number: ox16pci954
• Description: Integrated Quad Uart Interface
• Manufacturer: ETC-unknow

7.3
7.3.1
After a hardware reset, all writable registers are reset to
0x00, with the following exceptions:
DLL, which is reset to 0x01.
CPR, which is reset to 0x20.
The state of read-only registers following a hardware reset
is as follows:
RHR[7:0]: Indeterminate
RFL[6:0]: 0000000
TFL[6:0]: 0000000
LSR[7:0]: 0x60 signifying that both the transmitter and the
MSR[3:0]: 0000
MSR[7:4]: Dependent on modem input lines DCD, RI,
ISR[7:0]: 0x01, i.e. no interrupts are pending
ASR[7:0]: 1xx00000
The reset state of output signals are tabulated below:
Data Sheet Revision 1.3
OXFORD SEMICONDUCTOR LTD.
Reset Configuration
Signal
SOUT
DTR#
RTS#
Hardware Reset
Table 18: Output Signal Reset State
transmitter FIFO are empty
DSR and CTS respectively
2
2
2
2
Inactive High
Inactive High
Inactive High
Reset state
7.3.2
An additional feature available in the OX16C950 UART is
software resetting of the serial channel. This command has
the same effect on a single channel as a hardware reset
except it does not reset the clock source selections (i.e.
CKS register). To reset the UART write 0x00 to the
Channel Software Reset register ‘CSR’.
Software Reset
OX16PCI954
Page 34