as7c331mntd18a Alliance Memory, Inc, as7c331mntd18a Datasheet - Page 15

• Manufacturer Part Number: as7c331mntd18a
• Description: 3.3v 1m X 18 Pipelined Sram With Ntd
• Manufacturer: Alliance Memory, Inc

AC test conditions
Notes:
1) For test conditions, see “AC test conditions”, Figures A, B, C
2) This parameter measured with output load condition in Figure C.
3) This parameter is sampled, but not 100% tested.
4) t
5) t
6) This is a synchronous device. All addresses must meet the specified setup and hold times for all rising edges of CLK. All other synchronous inputs must
meet the setup and hold times with stable logic levels for all rising edges of CLK when chip is enabled.
7) Write refers to
8) Chip select refers to
12/24/04, v 2.7
HZOE
CH
• Output load: see Figure B, except for t
• Input pulse level: GND to 3V. See Figure A.
• Input rise and fall time (measured at 0.3V and 2.7V): 2 ns. See Figure A.
• Input and output timing reference levels: 1.5V.
+3.0V
GND
measured high above V
Figure A: Input waveform
10%
is less than t
90%
R/W and BW[a,b]
LZOE
CE0, CE1, and CE2
and t
IH
90%
HZC
and t
.
10%
is less than t
CL
.
measured as low below V
D
OUT
LZC
LZC
at any given temperature and voltage.
Figure B: Output load (A)
, t
Z
LZOE
0
= 50Ω
, t
HZOE
Alliance Semiconductor
IL
, t
HZC
30 pF*
50Ω
, see Figure C.
V
L
for 3.3V I/O;
= V
for 2.5V I/O
®
= 1.5V
DDQ
/2
353Ω/1538Ω
D
OUT
Figure C: Output load(B)
AS7C331MNTD18A
Thevenin equivalent:
5 pF*
319Ω/1667Ω
GND
+3.3V for 3.3V I/O;
/+2.5V for 2.5V I/O
*including scope
and jig capacitance
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