LMH7322SQ National Semiconductor Corporation, LMH7322SQ Datasheet - Page 13

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LMH7322SQ

Manufacturer Part Number
LMH7322SQ
Description
The ADC14V155 is a high-performance CMOS analog-to-digital converter with LVDS outputs. It is capable of converting analog input signals into 14-Bit digital words at rates up to 155 Mega Samples Per Second (MSPS). Data leaves the chip in a DDR (Dual
Manufacturer
National Semiconductor Corporation
Datasheet

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Pin Descriptions
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
Pin
VCCOA
LEA
LEA
VEEA
VCCIA
RHYSA
INA-
INA+
RHREFA
RHREFB
INB+
INB−
RHYSB
VCCIB
VEEB
LEB
LEB
VCCOB
QB
QB
VCCOB
VCCOA
QA
QA
Name
Positive Supply Output Stage part A
Latch Enable Input
Latch Enable Input Not
Negative Supply
Positive Supply for Input
Stage
Hysteresis Resistor
Negative Input
Positive Input
Reference Voltage Hysteresis
Resistor
Reference Voltage Hysteresis
Resistor
Positive Input
Negative Input
Hysteresis Resistor
Positive Supply for Input
Stage
Negative Supply
Latch Enable Input Not
Latch Enable Input Logic
Positive Supply for Output
Stage
Inverted Output
Output
Positive Supply for Output
Stage
Positive Supply for Output
Stage
Output
Inverted Output
Description
part A
part A
part A
part A
part A
part A
part A
part A
part B
part B
part B
part B
part B
part B
part B
part B
part B
part B
part B
part B
part A
part A
part A
The supply pin for the output stage is independent of the supply
pin for the input pin. This allows output levels of different logic
families.
Logic ‘1’ sets the part on hold. Logic levels are RSPECL (Reduced
Swing PECL) compatible.
Logic ‘0’ sets the part on hold. Logic levels are RSPECL
compatible.
The supply pin for the negative supply is connected to the VEEB
via a string of two anti-parallel diodes (see Figure 1)
The supply pin for the input stage is independent of the supply for
the output stage.
The hysteresis voltage is determined by connecting a resistor from
this pin to RHREFA.
Input for analog voltages between 200 mV below VEEA and 2V
below VCCIA.
Input for analog voltages between 200 mV below VEEA and 2V
below VCCIA.
The hysteresis voltage is determined by connecting a resistor from
this pin to RHYSA.
The hysteresis voltage is determined by connecting a resistor from
this pin to RHYSB.
Input for analog voltages between 200 mV below VEEB and 2V
below VCCIB.
Input for analog voltages between 200 mV below VEEB and 2V
below VCCIB.
The hysteresis voltage is determined by connecting a resistor from
this pin to RHREFB.
The supply pin for the input stage is independent of the supply for
the output stage.
The supply pin for the negative supply is connected to the VEEA
via a string of two anti-parallel diodes (see Figure 1).
Logic ‘0’ sets the part on hold. Logic levels are RSPECL
compatible.
‘1’ sets the part on hold. Logic levels are RSPECL compatible.
The supply pin for the output stage is independent of the supply
pin for the input pin. This allows output levels of different logic
families.
Output levels are determined by the choice of VCCOB.
Output levels are determined by the choice of VCCOB.
See other VCCOB
See other VCCOA.
Output levels are determined by the choice of VCCOA.
Output levels are determined by the choice of VCCOA.
13
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