LMH7322SQ National Semiconductor Corporation, LMH7322SQ Datasheet - Page 15

• Manufacturer Part Number: LMH7322SQ
• Description: The ADC14V155 is a high-performance CMOS analog-to-digital converter with LVDS outputs. It is capable of converting analog input signals into 14-Bit digital words at rates up to 155 Mega Samples Per Second (MSPS). Data leaves the chip in a DDR (Dual
• Manufacturer: National Semiconductor Corporation

Interface from Analog to LVDS
As seen in Figure 8, the LMH7322 can be configured to create
LVDS levels. This is done by connecting the V
discussed before the output levels are now at V
the logic ‘1’ and at V
of 1000 mV and 1400 mV comply with the LVDS levels. As
can be seen in this setup, an AC coupled signal via a trans-
mission line is used. This signal is terminated with 50Ω.
Figure 9 shows a standard comparator setup which creates
RSPECL levels because the V
this case the V
V
need to use different positive supply voltages. The input sig-
nal is AC coupled to the positive input. To maintain reliable
results the input pins IN+ and IN− are biased at 1.4V through
a resistive divider using a resistor of 1 kΩ to ground and a
resistor of 2.5 kΩ to the V
capacitors. Both inputs are connected to the bias level by the
use of a 10 kΩ resistor. With this input configuration the input
CCI
pin is connected to the V
FIGURE 8. ANALOG TO LVDS
EE
pin is connected to the ground level. The
CCO
−1.5V for the logic ‘0’. These levels
CC
and by adding two decoupling
CCO
CCO
supply voltage is +5V. In
pin because there is no
CCO
CCO
FIGURE 7. PECL TO RSECL
to 2.5V. As
–1.1V for
20183207
15
stage can work in a linear area with signals of approximately
3 V
DELAY AND DISPERSION
Comparators are widely used to connect the analog world to
the digital one. The accuracy of a comparator is dictated by
its DC properties, such as offset voltage and hysteresis, and
by its timing aspects, such as rise and fall times and delay.
For low frequency applications most comparators are much
faster than the analog input signals they handle. The timing
aspects are less important here than the accuracy of the input
switching levels. The higher the frequencies, the more impor-
tant the timing properties of the comparator become, because
the response of the comparator can make a noticeable
change in critical parameters such as time frame or duty cy-
cle. A designer has to know these effects and has to deal with
them. In order to predict what the output signal will do, several
parameters are defined which describe the behavior of the
PP
(see input level restrictions in the data tables.)
FIGURE 9. Standard Setup
20183206
www.national.com
20183208