hsp50215 Intersil Corporation, hsp50215 Datasheet - Page 6

no-image

hsp50215

Manufacturer Part Number
hsp50215
Description
Digital Upconverter
Manufacturer
Intersil Corporation
Datasheet
Data enters the FIFO with a write command to either Control
Word 0 (for I data), or Control Word 1 (for Q data). This
transfers data from the microprocessor holding register into the
first 16-bit register of the FIFO. The FIFO counter is
incremented every time data is written into the FIFO. Four
REFCLK periods are required from the rising edge of a WR
signal before another WR rising edge can occur, (i.e., before
data can once again be written into either the I or Q FIFO). This
limits the maximum data input (write) rate to 52MHz/4 =
13MHz.
NOTE: The Write rate is not the parameter that determines the
The timing details of these FIFO registers are shown in Figure
2. While the data for the I and Q inputs are independent, the
Write cycle limitations of the FIFO constrains the maximum
input symbol rate of quadrature symbols (both I and Q data) as
noted.
When the Shaping Filter requires another sample of data, a
request is made to the FIFO for data and the FIFO counter is
decremented. Figure 3 indicates the timing of a request for data
from the Shaping filter to the actual appearance of data at the
FIFO output. The FIFO has circuitry for detecting an empty
FIFO as well as a full FIFO. An “empty” FIFO detection causes
“zero” data to be entered into the shaping filter. A “full” FIFO
detection prevents data from being pushed out of the FIFO
before the filter requests it.
NOTE: Do not write to a full FIFO. Writing to a full FIFO is an er-
A programmable FIFO depth threshold sets when the
FIFORDY signal is asserted, alerting the data source that more
data is required. The FIFORDY signal assists a data source in
maintaining the desired FIFO data depth. Control Word 18, bits
0-2 are used to set the data FIFO depth threshold for both I and
Q inputs.
NOTE: SAMPCLK may be used instead of FIFORDY to indicate
.
Data Modulation Path
Three data path options are provided, one for each
modulation format. The modulation format is selected using
Control Word 16 (See the Microprocessor Write section).
Control Word 16 bits (1:0) are defined as: 00:QASK, 01:FM
maximum input rate, the shaping filter is. The maximum in-
put for the shaping filter is 52MHz/(IP)(DS), which is
52MHz/16 = 3.25 MHz for a minimal shaping filter (DS = IP =
4). See the Shaping Filter Section for more details.
ror condition and the part will be reset to prevent trans-
mission of erroneous data over the air.
that data is transferred from the FIFO to the shaping filter.
See the Pin Description Table.
FIGURE 3. FIFO DATA AND ENABLE TIMING
REFCLK
EnFIFO
IFIFO
3-427
HSP50215
with post-modulation filtering, and 10:FM with pre-
modulation pulse shaping. These modulation paths are
defined in the following subsections.
Modulation Mode 00 - QASK
This modulation mode configures the PUC as a BPSK,
QPSK, OQPSK, MSK or m-QAM modulator. The filter
configuration is shown in Figure 4. The data FIFO outputs
are routed to the shaping filters. Here the samples are
interpolated by 4, 8, or 16 and shaped using a FIR filter with
up to a 256 taps. The filter impulse response can span 4-16
input samples. A half (input) sample delay can be set in the I
channel for implementing OQPSK modulation. The output of
the shaping filter is routed through a gain adjust multiplier
and into the interpolation filter. The interpolation filter
interpolates by a factor set in the resampling NCO. The
output of the interpolation filter is at the master clock
frequency, REFCLK. The samples are then mixed with the
carrier L.O. for quadrature upconversion. The output is then
summed with the cascade input signal, saturated (in the
case of overflow), and formatted for output.
Modulation Mode 01 - FM with BANDLIMITING
Filter
This mode configures the PUC as an FM modulator with
post-modulation filtering. This mode provides for FSK and
FM modulation schemes. In this mode, the I input samples
drive the frequency control section of a quadrature NCO to
produce a zero IF FM signal. The FM quadrature signals are
then routed to the shaping FIR filter and into the interpolation
filter for bandlimiting and interpolation up to the master clock
rate as shown in Figure 5. The quadrature filtered FM signals
are then upconverted to the carrier frequency by the carrier
NCO and mixers. The output is then summed with the
cascade input signal, saturated (in the case of overflow), and
formatted for output. Note that pulse shaping in this mode
must be provided prior to the PUC.
Modulation Mode 10 - FM with Pulse Shaping
This mode configures the PUC as an FM modulator with pre-
modulation baseband pulse shaping. The data from the
FIFO (I channel only) is routed to the FIR shaping filter. The
FIR shaping filter output drives the frequency control section
I
Q
I
MODULATOR
FM
SHAPING
FILTER
FIGURE 5. FM WITH BANDLIMITING
FIGURE 4. QASK
SHAPING
FILTER
INTERPOLATION
FILTER
INTERPOLATION
FILTER
TO
MODULATOR

Related parts for hsp50215