hsp50214a Intersil Corporation, hsp50214a Datasheet - Page 23

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hsp50214a

Manufacturer Part Number
hsp50214a
Description
Programmable Downconverter
Manufacturer
Intersil Corporation
Datasheet
TABLE 7. AGC LOOP GAIN BINARY MANTISSA TO GAIN
TABLE 8. AGC LOOP GAIN BINARY EXPONENT TO GAIN
For example, if M
Gain = 0.3125*2
are set in the AGC Loop Parameter Control Register (Control
Word 8, Bits 0-15).
Two AGC loop gains are provided in the Programmable Down
Converter, for quick adjustment of the AGC loop. The AGC
Gain select is a control input to the device, selecting Gain 0
when AGCGNSEL = 0, and selecting Gain 1 when
AGCGNSEL = 1.
In the HSP50214, a reset event (caused by SYNCIN2 or
CW25) would clear the AGC loop filter accumulator. In the
HSP50214A, if Control Word 27, Bit 15 is set to zero, the
AGC loop filter accumulator will clear as in the original
HSP50214. If Control Word 27, Bit 15 is set to a one, the
backend reset (from CW25) will not clear the AGC loop filter
accumulator.
(MMMM)
BINARY
BINARY
(EEEE)
CODE
CODE
0000
0001
0010
0011
0100
0101
0110
0111
0000
0001
0010
0011
0100
0101
0110
0111
SCALE FACTOR MAPPING
SCALE FACTOR MAPPING
-7
LG
. The loop gain mantissas and exponents
FACTOR
FACTOR
SCALE
SCALE
0.0000
0.0625
0.1250
0.1875
0.2500
0.3125
0.3750
0.4375
2
= 0101 and E
2
2
2
2
2
2
2
10-
15
14
13
12
11
9
8
(MMMM)
BINARY
BINARY
(EEEE)
LG
CODE
CODE
1000
1001
1010
1011
1100
1101
1110
1111
1000
1001
1010
1011
1100
1101
1110
1111
= 1100, the AGC Loop
FACTOR
FACTOR
SCALE
SCALE
0.5000
0.5625
0.6250
0.6875
0.7500
0.8125
0.8750
0.9375
2
2
2
2
2
2
2
2
7
6
5
4
3
2
1
0
HSP50214A
23
In the HSP50214, the settling mode of the AGC forces the
mean of the signal magnitude error to zero. The gain error is
scaled and used to adjust the gain up or down. This propor-
tional scaling mode causes the AGC to settle to the final gain
value asymptotically. This AGC settling mode is preferred in
many applications because the loop gain adjustments get
smaller and smaller as the loop settles, reducing any AM dis-
tortion caused by the AGC.
With this AGC settling mode, the proportional gain error
causes the loop to settle more slowly if the threshold is
small. This is because the maximum value of the threshold
minus the magnitude is smaller. Also, the settling can be
asymmetric, where the loop may settle faster for “over range”
signals than for “under range” signals (or vice versa).
In some applications, such as burst signals or TDMA signals,
a very fast settling time and/or a more predictable settling
time is desired. The AGC may be turned off or slowed down
after an initial AGC settling period.
To minimize the settling time, a median AGC settling mode
has been added to the HSP50214A. This mode uses a fixed
gain adjustment with only the direction of the adjustment
controlled by the gain error. This makes the settling time
independent of the signal level.
For example, if the loop is set to adjust 0.5dB per output
sample, the loop gain can slew up or down by 16dB in 16
symbol times, assuming a 2 samples per symbol output
sample rate. This is called a median settling mode because
the loop settles to where there is an equal number of magni-
tude samples above and below the threshold. The disadvan-
tage of this mode is that the loop will have a wander (dither)
equal to the programmed step size. For this reason, it is
advisable to set one loop gain for fast settling at the begin-
ning of the burst and the second loop gain for small adjust-
ments during tracking.
The median settling mode is enabled by setting Control
Word 27, Bit 16 to a logic one. If Control Word 27, Bit 16 is
zero, the mean loop settling mode is selected and the loop
works identically to the HSP50214.
In the median mode, the loop works as follows:
The sign of the true gain error selects a fixed gain error of
0010000000000
These gain error values are scaled by the programmable
AGC loop gains to adjust the data path gain.
The maximum slew rate is ~1.5dB per output sample. See
Equation 18.
In order to fully evaluate the dynamic range of the PDC,
Table 9B is provided, which details the bit weighting from the
input to the AGC Multiplier.
Re-Sampler/Halfband Filter
The re-sampler is an NCO controlled polyphase filter that
allows the output sample rate to have a non-integer relation-
ship to the input sample rate. The filter engine can be viewed
conceptually as a fixed interpolation filter, followed by an
NCO controlled decimator.
b
or 1110000000000
b
.

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