ipm6210a Intersil Corporation, ipm6210a Datasheet - Page 12

• Manufacturer Part Number: ipm6210a
• Description: Precision Dual Pwm Controller And Linear Regulator For Notebook Cpus
• Manufacturer: Intersil Corporation

The overcurrent protection circuit trips when the peak value
of the lower MOSFET current is higher than the one
obtained from the following equation.
I
where: R
the desired overload current trip level; r
r
current sense resistor; I
protection circuitry (140µA).
In the linear regulator the maximum current of the
integrated power device is actively limited to 250mA that
eventually creates an undervoltage condition and sets the
fault latch.
Overvoltage Protection
During operation, severe load dump or a short of an upper
MOSFET can cause the output voltage to increase
significantly over normal operation range. When the output
exceeds the overvoltage threshold of 115% of the DAC
voltage (1.7V for PWM2), the overvoltage comparator forces
the lower gate driver high and turns the lower MOSFET on.
This will pull down the output voltage and eventually blow
the battery fuse. As soon as output voltage drops below the
threshold, OVP comparator is disengaged.
Such an OVP scheme provides soft crowbar function and
does not interfere with on-the-fly VID code changes. During
downward changes in the converter output voltage, the
condition where the OVP threshold is set before the new
value of the output voltage is reached is permissible and
harmless. Also, it does not invert output voltage when
activated, a common problem for OVP schemes with a latch.
Overvoltage protection is not provided for the linear regulator.
Shutdown
When EN (pin 20) is pulled down, the chip is disabled and
enters a low-current state. Both high-side and low-side gate
drivers are turned off. This control scheme produces no
negative output voltage at shutdown, as shown in Figure 11.
A rising edge on EN clears the fault latch.
Thermal Shutdown
The chip incorporates an over temperature protection circuit
that shuts all the outputs down when the die temperature of
150
temperatures below 125
Design Procedure and Component
Selection Guidelines
As an initial step, define operating voltage range, minimum
and maximum load currents for each controller.
OC
DS(ON)
o
=
C is reached. Normal operation restores at die
I
------------------------------------------------ -
th
of the lower MOSFET, or the value of the optional
CS
⋅
(
R
R
CS
is a resistor from ISEN pin to PHASE pin; I
D SON
+
100Ω
)
th
o
C through the full soft-start cycle.
is the threshold of the current
12
DS(ON)
is either
oc
IPM6210A
is
Output Inductor Selection
The minimum practical output inductor value is the one that
keeps inductor current just on the boundary of continuous
conduction at some minimum load. The industry standard
practice is to choose the minimum current somewhere from
10% to 25% of the nominal current. At light load, IPM6210A
PWM controllers automatically switch to a hysteretic mode of
operation to sustain high efficiency. It is suggested that
transition to hysteretic mode occur before inductor current
becomes discontinuous. The following equations help to
choose proper value of the output filter inductor.
Output Capacitor Selection
An output capacitor serves two major functions in a switching
power supply. Along with an inductor it filters the sequence of
pulses produced by the switcher and supply the load transient
currents. The filtering requirements are a function of the
switching frequency and the ripple current allowed, and are
usually easy to satisfy in high frequency converters.
The load transient requirements are a function of the slew
rate (di/dt) and the magnitude of the transient load current.
Modern microprocessors produce transient load rates in
excess of 10A/µs. High frequency ceramic capacitors placed
beneath the processor socket initially supply the transient
and reduce the slew rate seen by the bulk capacitors. The
bulk capacitor values are generally determined by the total
allowable ESR rather than actual capacitance requirements.
High frequency decoupling capacitors should be placed as
close to the processor power pins as physically possible.
Consult with the processor manufacturer for specific decoupling
requirements. Use only specialized low-ESR electrolytic
capacitors intended for switching-regulator applications for the
bulk capacitors. The bulk capacitor’s ESR will determine the
∆I
∆I
L
=
=
=
Vin Vo ut
---------------------------- -
1
2
3
4
2x I
∆Vout
-----------------
Fs
ESR
Ch1 500mV
Ch3 1.0V
–
min
×
∆I
FIGURE 11. SHUTDOWN WAVEFORMS
×
Vout
------------ -
Vin
Ch2 500mV
Ch4 5.0V
M1.0ms
1.60V
1.50V
2.50V
EN
CORE
IO
CLK