ipm6210a Intersil Corporation, ipm6210a Datasheet - Page 13

• Manufacturer Part Number: ipm6210a
• Description: Precision Dual Pwm Controller And Linear Regulator For Notebook Cpus
• Manufacturer: Intersil Corporation

output ripple voltage and the initial voltage drop after a
transient. In most cases, multiple electrolytic capacitors of small
case size perform better than a single large case capacitor.
MOSFET Selection and Considerations
Requirements for the upper and lower MOSFETs are
different in mobile applications. The reason for that is the
10:1 difference in conduction time of the lower and the upper
MOSFETs driven by a difference between the input voltage
which is nominally in the range from 8V to 20V, while
nominal output voltage is about 1.5V.
Requirements for the lower MOSFET are simpler than
those to the upper one. The lower the r
device, the lower the conduction losses, the higher the
converter’s efficiency. Switching losses and gate drive
losses are not significant because of zero-voltage switching
conditions inherent for this device in the buck converter.
Low reverse recovery charge of the body diode is important
because it causes shoot-trough current spikes when the
upper MOSFET turns on. Also, important is to verify that
the lower MOSFET gate voltage does not reach threshold
when high dV/dt transition occurs on the phase node. To
minimize this effect, IPM6210A has a low, 0.8Ω typical, low
side driver pull-down resistance.
Requirements to the upper MOSFET r
stringent than to the lower MOSFET because its conduction
time is significantly shorter so switching losses can dominate
especially at higher input voltages. It is recommended to have
equal conduction and switching losses in the upper MOSFET
at the nominal input voltage and load current. Then the
maximum of the converter efficiency is tuned to the operating
point where it is most desired. Also, this provides the most
cost effective solution.
Precise calculation of power dissipation in the MOSFETs is
very complex because many parameters affecting turn-on
and turn-off times such as gate reverse transfer charge, gate
internal resistance, body diode reverse recovery charge,
package and layout impedances and their variation with the
operation conditions are not available to a designer. The
following equations are provided only for rough estimation of
the power losses and should be accompanied by a detailed
breadboard evaluation. Attention should be paid to the input
voltage extremes where power dissipation in the MOSFETs
is usually higher.
P
Table 2 provides some component information for several
typical applications.
P
LOWER
U PPER
=
=
Io
---------------------------------------------------------- -
Io
2
2
×
×
r
r
DS ON
DS ON
V
(
(
IN
)
)
(
×
V
§
¨
©
OUT
1
13
–
V
--------------- -
)
V
+
OUT
I N
Io
--------------------------------------------------------------- -
×
·
¸
¹
DS(ON)
V
IN
DS(ON)
xFs
2
×
are less
ton
of this
+
toff
IPM6210A
Layout Considerations
Switching converters, even during normal operation,
produce short pulses of current which could cause
substantial ringing and be a source of EMI pollution if layout
constrains are not observed.
There are two sets of critical components in a DC-DC
converter. The switching power components process large
amounts of energy at high rate and though, usually appear
to be a source of a noise, end a low power components
responsible for bias and feedback functions, though appear
to be mainly recipients of the noise. The situation with the
IPM6210A control IC is even more critical as it provides
control functions for two independent converters and poor
layout design could lead to cross talk between the
converters and result in degradation in the performance.
A multi-layer printed circuit board is recommended.
Dedicate one solid layer for a ground plane. Dedicate
another solid layer as a power plane and break this plane
into smaller island of common voltage levels.
Notice all the nodes that are subjected to high dV/dt voltage
swing as PHASE1,2 nodes, for example. All surrounding
circuitry will tend to couple the noise from these nodes
trough stray capacitance. Do not oversize copper traces
connected to these nodes. Do not place traces connected to
the feedback components adjacent to these traces.
Keep the wiring traces from the control IC to the MOSFET
gate and source as short as possible and capable to handle
peak currents up to 2A. Minimize the area within the gate-
source path to reduce stray inductance and eliminate
parasitic ringing at the gate.
Locate small critical components like the soft-start capacitor
and current sense resistors as close, as possible to the
respective pins of the IC.
Maximum
CPU Current
Inductor
Output
Capacitor
High-Side
MOSFET
Low-Side
MOSFET
Current-Input
Resistor
~6% Droop At
V
COMPONENT
O
= 1.6V
for
ETQP6F2R0BFA
4x2R5TPC220M
EEFUE0D271R
ITF86130SK8T
HUF76112SK8
CIRCUIT 1
Panasonic
Panasonic
3x270µF
1.27kΩ
Sanyo
2.0µH
8.0A
or
TABLE 2
ETQP6F2R0BFA
6x2R5TPC220M
EEFUE0D271R
ITF86130SK8T
HUF76112SK8
CIRCUIT 2
Panasonic
Panasonic
5x270µF
1.00kΩ
Sanyo
12.0A
1.0µH
2x
or
ETQP6F2R0BFA
EEFUE0D271R
ITF86130SK8T
HUF76112SK8
CIRCUIT 3
Panasonic
Panasonic
6x270µF
1.50kΩ
18.0A
0.8µH
2x
2x