74HC240N,652 NXP Semiconductors, 74HC240N,652 Datasheet - Page 8

IC INVERTER DUAL 4-INPUT 20DIP

74HC240N,652

Manufacturer Part Number
74HC240N,652
Description
IC INVERTER DUAL 4-INPUT 20DIP
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC240N,652

Package / Case
20-DIP (0.300", 7.62mm)
Logic Type
Inverter
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Logic Family
HC
Number Of Channels Per Chip
8
Polarity
Inverting
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
High Level Output Current
- 7.8 mA
Low Level Output Current
7.8 mA
Maximum Power Dissipation
750 mW
Minimum Operating Temperature
- 40 C
Output Current
35 mA
Output Type
3-State
Propagation Delay Time
100 ns @ 2 V or 20 ns @ 4.5 V or 17 ns @ 6 V
Number Of Lines (input / Output)
8 / 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2649-5
933670520652
NXP Semiconductors
Table 7.
GND = 0 V; for load circuit see
[1]
[2]
[3]
[4]
[5]
11. Waveforms
74HC_HCT240_3
Product data sheet
Symbol Parameter
74HCT240
t
t
t
t
C
pd
en
dis
t
Fig 6. Input (nAn) to output (nYn) propagation delays and output transition times
PD
t
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
pd
en
dis
t
i
o
D
CC
is the same as t
PD
L
= output frequency in MHz;
= input frequency in MHz;
(C
is the same as t
is the same as t
= output load capacitance in pF;
is the same as t
= C
is used to determine the dynamic power dissipation (P
= supply voltage in V;
L
Measurement points are given in
V
propagation delay nAn to nYn;
enable time
disable time
transition time
power dissipation
capacitance
PD
OL
V
Dynamic characteristics
CC
and V
V
2
CC
f
2
OH
o
) = sum of outputs.
THL
PHL
PZH
f
are typical voltage output drop that occur with the output load.
PHZ
i
and t
N +
and t
and t
and t
TLH
PLH
PZL
PLZ
(C
Conditions
see
nOE to nYn; V
Figure 7
nOE to nYn; V
Figure 7
V
per transceiver;
V
.
Figure
CC
I
.
.
.
L
V
V
= GND to V
CC
CC
Figure 6
= 4.5 V; see
V
nAn input
nYn output
CC
= 4.5 V
= 5.0 V; C
8.
…continued
2
Table
GND
V
V
f
OH
o
OL
V
) where:
8.
I
CC
CC
CC
L
Figure 6
= 4.5 V; see
= 4.5 V; see
= 15 pF
1.5 V
Rev. 03 — 2 August 2007
V
M
t
PHL
D
in W):
V
M
[1]
[2]
[3]
[4]
[5]
Min
-
-
-
-
-
-
V
74HC240; 74HCT240
Octal buffer/line driver; 3-state; inverting
M
t
PLH
25 C
Typ
11
13
13
30
9
5
mgu781
V
M
Max
20
30
25
12
-
-
(85 C)
40 C to +125 C Unit
Max
25
38
31
15
-
-
© NXP B.V. 2007. All rights reserved.
(125 C)
Max
30
45
38
18
-
-
ns
ns
ns
ns
ns
pF
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