ak4523 AKM Semiconductor, Inc., ak4523 Datasheet - Page 11

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ak4523

Manufacturer Part Number
ak4523
Description
20bit Stereo Ds Adc & Dac
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
n Audio Serial Interface Format
Data is shifted in/out the SDTI/SDTO pins using SCLK and LRCK inputs. Four serial data modes selected by the DIF0 and
DIF1 pins are supported as shown in Table 2. In all modes the serial data has MSB first, 2’s compliment format. The data
is clocked out on the falling edge of SCLK and latched on the rising edge. For mode 3, if SCLK is 32fs, then the least
significant bits will be truncated.
M0021-E-03
SCLK(i:32fs)
SDTO(o)
SDTI(i)
SCLK(i:64fs)
SDTO(o)
SDTI(i)
LRCK(i)
SCLK(i:64fs)
SDTO(o)
SDTI(i)
LRCK(i)
Mode
0
1
2
3
DIF1
0
0
0
0
0
1
1
SDTO-19:MSB, 0:LSB; SDTI-15:MSB, 0:LSB
19:MSB, 0:LSB
19
15 14 13
19
19
Don’t Care
Don’t Care
1
1
1
18
18
18
2
2
2
17
17
DIF0
3
3
0
1
0
1
8
12
11 10
15
19
7
3
7
17
Lch Data
13
Lch Data
9
14
18
6
6
2
20bit, MSB justified
20bit, MSB justified
20bit, MSB justified
14
10
18
13
9
5
1
SDTO (ADC)
11
19
IIS (I2S)
12 11
12 11
0
Table 2. Serial Data Modes
4
0
8
Figure 1. Mode 0 Timing
Figure 2. Mode 1 Timing
12
20
20
7
3
13
21
6
2
2
14
30
- 11 -
1
5
1
1
31
15
31
4
0
0
0
0
0
0
20bit, MSB justified
16bit, LSB justified
20bit, LSB justified
19 18
15
19 18
19 18
Don’t Care
Don’t Care
1
1
1
SDTI (DAC)
14 13
IIS (I2S)
2
2
2
17
17
3
8
12
15
19
11 10
7
3
7
17
Rch Data
13
Rch Data
9
14
18
6
6
2
10
18
14
13
5
1
9
11
19
H/L
H/L
L/H
L/R
H/L
12 11
12 11
4
0
0
8
12
20
20
3
7
13
21
6
2
2
SCLK (Slave)
32fs or ³ 40fs
14
5
1
1
1
³ 32fs
³ 40fs
³ 40fs
15
31
31
[AK4523]
4
0
0
0
1999/12
0
0
0
19
19
15
19
1
1
1

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