ak4532 AKM Semiconductor, Inc., ak4532 Datasheet - Page 13

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ak4532

Manufacturer Part Number
ak4532
Description
Internet/network/general Purpose Multimedia Audio Codec
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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SDO output is the 16bit data of ADC and goes “L”(0000H) in the following cases.
4.6. Analog output pin(LOUT, ROUT) operation
These outputs are floating in the following case.
5.
The external clocks which are required to operate the AK4532 are MCLK, LRCK and SCLK. MCLK
All external clocks should always be present whenever the AK4532 is in normal operation mode. If these
5.
0178-E-02
• During initializing the analog section(516/fs).
System Clock
should be synchronized with LRCK but the phase is free of care. As the AK4532 includes the phase
detect circuit for LRCK, the AK4532 is reset automatically when the synchronization is out of
phase by changing the clock frequencies. Therefore, the reset is not required except only upon
power-up.
clocks are not provided, the AK4532 may draw excessive current and do not possibly operate
properly because the device utilizes the dynamic logic internally. If the external clocks are not
present, the AK4532 should be in the power down mode.
Digital High Pass Filter
The ADC of the AK4532 has a digital high pass filter for DC offset cancel. The cut-off frequency of
the HPF is 6.85Hz at fs=44.1kHz and the frequency response at 20Hz is -0.5dB. It also scales with
sampling rate(fs).
PD
RST
PD
PD
PD
pin = “L”
register = “0”
pin = “L”
register = “0”
register = “0”
13
[AK4532]
2004/12

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