ak4645 ETC-unknow, ak4645 Datasheet - Page 16

• Manufacturer Part Number: ak4645
• Description: Stereo Codec With Mic/hp-amp
• Manufacturer: ETC-unknow

ASAHI KASEI
Parameter
Control Interface Timing (3-wire Serial mode)
Control Interface Timing (I
Power-down & Reset Timing
Note 33. I
Note 34. Data must be held long enough to bridge the 300ns-transition time of SCL.
Note 35. The AK4645 can be reset by the PDN pin = “L”.
Note 36. This is the count of LRCK “↑” from the PMADL or PMADR bit = “1”.
MS0543-E-00
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling (Note 34)
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
Capacitive Load on Bus
Pulse Width of Spike Noise Suppressed by Input Filter
CCLK Period
CCLK Pulse Width Low
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
PDN Pulse Width (Note 35)
PMADL or PMADR “↑” to SDTO valid (Note 36)
2
Pulse Width High
C is a registered trademark of Philips Semiconductors.
2
C Bus mode):
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tHD:DAT
tHD:STA
tSU:DAT
tSU:STA
tSU:STO
Symbol
tCCKL
tCCKH
tHIGH
tLOW
tCSW
tCCK
tCDH
tCDS
tCSH
tBUF
tPDV
fSCL
tCSS
tPD
tSP
Cb
tR
tF
min
200
150
150
1.3
0.6
1.3
0.6
0.6
0.1
0.6
80
80
40
40
50
50
0
0
-
-
-
-
-
1059
typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
max
400
400
0.3
0.3
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
[AK4645]
2006/09
Units
kHz
1/fs
pF
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns