ak4184a AKM Semiconductor, Inc., ak4184a Datasheet - Page 14
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ak4184a
Manufacturer Part Number
ak4184a
Description
Tsc With Keypad Scanner And Gpio Expander
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4184A.pdf
(36 pages)
■
The AK4184A supports a SPI bus system. The Host processor starts to communicate with the serial clock. The digital
interface can be operated from 1.6V, which enables connecting with a low voltage host controller. The full scale level
of the digital I/O voltage is specified IOVDD.
The AK4184A is controlled by reading from and writing to registers through the 4-wire serial interface (CSN, SCLK,
DIN, and DOUT pins). The data is composed of control command, control data, and readout data. The transmitter
sends each bit on the falling edge of the SCLK pin and the receiver latches on the rising edge of SCLK. The first 16
bits after the falling edge of the CSN pin contains the control command followed by 16 bits of control data during the
write operation, or 16 bits of readout data during the read operation before the rising edge of the CSN. This completes
a write or read operation. The max clock speed of the SCLK pin is 5MHz. The register value is reset by pulling
RESETN pin to “L”.
The control command layout is shown in
next lower 8-bits [D7:D0] are filled with “0” when accessing the touch screen block. The lower 8 bit word is
composed of other block control commands, which specify control of the Keypad, GPIO, and PWM output. When
accessing touch panel functions, the lower 8-bit word [D7:D0] is filled with “0” data. When accessing Keypad, GPIO,
or PWM control, the upper 8-bit word [D15:D8] is filled with “0” data.
This command begins with the S bit which specifies access to the touch screen block. The S bit must be set to “1”.
The touch screen command begins with the A1:A0 bits, which select the measurement axis (X, Y, and Z). The PD bit
specifies power down control of the touch screen driver and the A/D converter. When controlling other blocks, the
first bit is a W/R bit, which specifies the direction of data flow on the bus. The next bit specifies the page bit of the
register, which is the data register and the control register as shown in
address specified in the register. The page and address of the register is shown in
that are read from or written to the register in
operations.
MS0947-E-00
Digital Interface
XN
YN
Touch Panel
X-Plate (Top side)
Y-Plate (Bottom side)
XP
8 GPIO
KEYPAD
LED Driver
6 x 5
Figure 8. Typical peripheral connection diagram
YP
Table
Table
2. The upper 8-bit word is the touch screen control command. The
4. 32 SCLK cycles are necessary for both read and write
- 14 -
TP Interface
KP Interface
GPIO port
BRCONT
AK4184A
AVDD=2.5V ~ 3.6V
Table
3. The data of the next 6 bits are the
IOVDD
DOUT
CSN
SCLK
DIN
PENIRQN
KEYIRQN
Table
IOVDD=1.6V~AVDD
4. The next 16 bits are data
μP
[AK4184A]
2008/04