ak4184 AKM Semiconductor, Inc., ak4184 Datasheet - Page 26

• Manufacturer Part Number: ak4184
• Description: Tsc With Keypad Scanner And Gpio Expander
• Manufacturer: AKM Semiconductor, Inc.

L
The AK4184 has eight ports [GP0:GP7] which can be configured as inputs or outputs for general purpose. Figure 14
shows a block diagram of a single GPIO pin. The GPIO Pin Direction register (GPDR) is used to program the GPIO
pins as input or output. For a pin configured as output, use the GPIO pin pull-up register (GPPU) to set the pin type to
either Open-Drain or CMOS, and use the GPIO Set/Clear register (GPSCR) to set a pin level high or low.
To validate the state of GP0 ~GP7 pins, write to the GPIO pin state register (GPSR) to program the pin state as pull-
down or Hi-Z and read the GPIO Pin Level register (GPLR) at any time even if the pin is configured as an output. The
GPIO pin state is determined by these registers before writing and reading the pin level.
The pin state set by default input, pull-down.
L
The GPIO pin set/clear register sets the pin level when the pin is configured as an output (Table 28: IO bit = “1”).
GPSCR is a write-only register. The actual pin level is read from the GPLR register.
L
Whether a pin is input or an output is determined by the GPDR register. The GPDR contains one direction-control bit
for each of the eight GPIO pins.
MS0603-E-00
Addr
Addr
11H
10H
GPIO Pin Set/Clear Register (PAGE 1)
GPIO Pin Direction Register (PAGE 1 )
GPIO controller
15:8
Bits
7:0
GPSCR
GPDR
Name
Name
Name
SC
15:8
Bits
7:0
D15
D15
IO7
0
Reserved
Set GPIO Pin level for GPIO pins
0 = Set pin level low (default)
1 = Set pin level high
D14
D14
IO6
Name
0
(GPSCR)
Pin Level
IO
(GPLR)
Pin Set
D13
D13
IO5
0
Figure 14. General-Purpose I/O Block Diagram
Pin Direction
Table 25. GPIO Pin Set/Clear Register Format
Table 27. GPIO Pin Direction Register Format
GPIO Direction select
0 = GPIO pin configured as input. (default)
1 = GPIO pin configured as output.
Reserved
(GPDR)
D12
D12
Table 26. GPIO Pin Set/Clear Register
IO4
0
Table 28. GPIO Direction Register
D11
D11
IO3
0
D10
Pin Pull-up
0
D10
IO2
(GPPU)
D9
26
0
IO1
D9
Description
Description
D8
0
IO0
D8
SC7
D7
Pin State
(GPSR)
D7
0
SC6
D6
D6
GPIO Pin
0
SC5
D5
D5
0
SC4
D4
D4
0
SC3
D3
D3
0
SC2
D2
D2
0
2007/04
SC1
D1
D1
[AK4184]
0
SC0
D0
D0
0