msm7719-01 Oki Semiconductor, msm7719-01 Datasheet - Page 4
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msm7719-01
Manufacturer Part Number
msm7719-01
Description
Echo Canceler With Adpcm Transcoder
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7719-01.pdf
(40 pages)
¡ Semiconductor
PIN FUNCTIONAL DESCRIPTION
SG
Outputs of the analog signal ground voltage.
The output voltage is approximately 2.4 V. Connect bypass capacitors of 10 mF and 0.1 mF
(ceramic type) between these pins and the AG pin. During power-down, the output changes
to 0 V.
AG
Analog ground.
DG1, 2, 3
Digital ground.
V
+5 V power supply for analog circuits.
V
+5 V power supply for digital circuits.
PDN/RST
Power-down reset control input.
A logic “0” makes the LSI device enter a power-down state. At the same time, all control register
data are reset to the initial state. Set this pin to a logic “1” during normal operating mode. Since this pin
is ORed with CR0-B5 (bit 5 (B5) of control register CR0), set CR0-B5 to logic “0” when using this pin.
When this pin control is not used (i.e., when controlling by the control register), set this pin to logic
“1”.
PDWN
Power-down control input.
The device changes to the power-down state, and each bit of control register and internal variables
of control register are not reset when set to a logic “0”. During normal operation, set this pin to logic
“1”. Since this pin is ORed with CR0-B6 (bit 6 (B6) of control register CR0), set CR0-B6 to logic “0”
when using this pin. When this pin control is not used (i.e., when controlling by the control register),
set this pin to logic “1”.
MCK
Master clock input.
The frequency must be 9.6 to 10.0 MHz/19.2 to 20.0 MHz. The master clock signal is allowed to be
asynchronous with SYNCP, SYNCA, BCLKP, and BCLKA.
DDA
DDD1, 2, 3
MSM7719-01
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