msm7650 Oki Semiconductor, msm7650 Datasheet - Page 29
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msm7650
Manufacturer Part Number
msm7650
Description
Ntsc/pal Digital Encoder
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7650.pdf
(34 pages)
- Current page: 29 of 34
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CONTENTS OF INTERNAL REGISTER SETTING
All registers can be written by accessing 8 bits.
"0" is read from an undefined bit.
The contents of internal registers are shown below. (A value with "*" is the default.)
Mode Register (MR) (Default value after system reset: 10H)
MR[7]
MR[6]
MR[5]
MR[4]
MR[3]
MR[2:0]
Override
Chroma format
Black level control
Synchronization mode
Pixel sampling ratio
Video mode select
Selects setting of external terminal or internal register
Black level setting (setup)
Sampling ratio
Selects operation mode
Chrominance signal input format
Note) Valid only for NTSC.
Selects master/slave operation of sync signal generator.
*000:
001:
010:
100:
101:
*0:
*0:
*0:
*1:
*0:
1:
1:
1:
0:
1:
setting of external terminal is valid
setting of internal registers is valid
Offset binary
2's Complement
Black level 7.5 IRE
Black level 0 IRE
slave mode
master mode
4:2:2
4:1:1
CCIR 601 NTSC 13.5 MHz
NTSC Square Pixel 12.27 MHz
NTSC 4Fsc 14.32 MHz
CCIR 601 PAL 13.5 MHz
PAL Square Pixel 14.75 MHz
MSM7650
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