mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 115
mt9074ap1
Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9074AP1.pdf
(151 pages)
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7 - 0
7 - 0
Bit
Bit
Bit
7
6
5
4
3
2
1
0
EFAS7 - 0
PSM7-0
MFALM
Name
Name
RSLIP
Name
Table 119 - Errored Frame Alignment Signal Counter
AIS16
AUXP
LOS
RAI
AIS
- - -
Table 117 - CRC Multiframe Counter for PRBS
Table 118 - Alarm Reporting Latch
This counter is incremented for each received CRC multiframe. It is
cleared when the PRBS Error Counter is written to.
Errored FAS Counter. An 8 bit counter that is incremented once for
every receive frame alignment signal that contains one or more errors.
Remote Alarm Indication. This bit is set to one in the event of receipt
of a remote alarm, i.e. A(RAI) = 1. It is cleared when the register is
read.
Alarm Indication Signal. This bit is set to one in the event of receipt of
an all ones alarm. It is cleared when the register is read.
AIS Time Slot 16 Alarm. This bit is set to one in the event of receipt of
an all ones alarm in the time slot 16. It is cleared when the register is
read.
Loss of Signal. This bit is set to one in the event of digital loss of
received signal. It is cleared when the register is read.
Auxiliary Alarm. This bit is set to one in the event of receipt of the
auxiliary alarm pattern. It is cleared when the register is read.
Multiframe Alarm. This bit is set to one in the event of receipt of a
multiframe alarm. It is cleared when the register is read.
Received Slip. This bit is set to one in the event of receive elastic
buffer slip. It is cleared when the register is read.
Unused.
(Page 4, Address 12H) (E1)
(Page 4, Address 13H) (E1)
(Page 4, Address 11H) (E1)
Zarlink Semiconductor Inc.
MT9074
115
Functional Description
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