mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 85

• Manufacturer Part Number: mt9074ap1
• Description: T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
• Manufacturer: Zarlink Semiconductor

Bit
Bit
4
3
2
1
0
7
6
5
4
3
2
PRBSMFO
MFOOFO
HDLC0I
HDLC1I
COFAO
PRBSO
1SECI
5SECI
Name
Name
BPVO
LCDI
- - -
Unused.
HDLC0 Interrupt. Whenever an unmasked HDLC0 interrupt occurs (from
the 4 kHz data link) this bit goes high. Reading this register clears this bit.
HDLC1 Interrupt. Whenever an unmasked HDLC1 interrupt occurs (from
the DS1 channel 24 signaling channel) this bit goes high. Reading this
register clears this bit.
Loop Code Detected Interrupt. When unmasked this interrupt bit goes
high whenever either the loop up (00001) or loop down (001) code has been
detected on the line for a period of 48 milliseconds. Reading this register
clears this bit.
One Second Status Interrupt. When unmasked this interrupt bit goes high
whenever the 1SEC status bit (page 3 address 12H bit 7) goes from low to
high. Reading this register clears this bit.
Five Second Status Interrupt. When unmasked this interrupt bit goes high
whenever the 5 SEC status bit goes from low to high. Reading this register
clears this bit.
Change of Frame Alignment Counter Overflow Interrupt. When
unmasked this interrupt bit goes high whenever the change of frame
alignment counter changes from FFH to 00H. Reading this register clears
this bit.
Bipolar Violation Counter Overflow Interrupt. When unmasked this
interrupt bit goes high whenever the bipolar violation counter changes from
FFH to 00H. Reading this register clears this bit.
Psuedo Random Bit Sequence Error Counter Overflow Interrupt. When
unmasked this interrupt bit goes high whenever the PRBS error counter
changes from FFH to 00H. Reading this register clears this bit.
Psuedo Random Bit Sequence Multiframe Counter Overflow Interrupt.
When unmasked this interrupt bit goes high whenever the multiframe
counter attached to the PRBS error counter overflows. FFH to 00H. 1 -
unmasked, 0 - masked.
Multiframes Out Of Sync Overflow Interrupt. When unmasked this
interrupt bit goes high whenever the multiframes out of frame counter
changes from FFH to 00H. Reading this register clears this bit.
Table 69 - Interrupt Word Three
Table 68 - Interrupt Word Two
(Page 4, Address 1EH) (T1)
(Page 4, Address 1DH) (T1)
Zarlink Semiconductor Inc.
MT9074
85
Functional Description
Functional Description
Data Sheet