mt9074ap1 Zarlink Semiconductor, mt9074ap1 Datasheet - Page 18
mt9074ap1
Manufacturer Part Number
mt9074ap1
Description
T1/e1/j1 Single Chip Transceiver With Wide Dynamic Range Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9074AP1.pdf
(151 pages)
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Alternatively, the pulse level and shape may be discretely programmed by writing to the Custom Pulse Level
registers (addresses 1CH to 1FH, page 2) and setting the Custom Transmit Pulse bit high (bit 3 of the Transmit
Pulse Control Word). In this case the output of each of the registers directly drives the D/A converter going to the
line driver. Tables 1 and 2 show recommended transmit pulse amplitude settings.
In T1 mode, the template for the transmitted pulse (the DSX-1 template) is shown in Figure 7. The nominal peak
voltage of a mark is 3 volts. The ratio of the amplitude of the transmit pulses generated by TTIP and TRING lie
between 0.95 and 1.05.
In E1 mode, the template for the transmitted pulse, as specified in G.703, is shown in Figure 8. The nominal peak
voltage of a mark is 3 volts for 120 Ω twisted pair applications and 2.37 volts for 75 Ω coax applications. The ratio of
the amplitude of the transmit pulses generated by TTIP and TRING lie between 0.95 and 1.05.
Figure 4 - Input Jitter Tolerance as recommended by ETSI 300 011 (E1)
138UI
100UI
Figure 3 - Input Jitter Tolerance as Recommended by TR-62411 (T1)
1.0UI
0.4UI
28UI
10UI
18UI
1.5UI
0.2UI
Jitter Amplitude
0.1Hz
Peak to Peak
(log scale)
Jitter Amplitude
Peak to Peak
(log scale)
1.0Hz
1.667 Hz
4.9 Hz
10Hz
20 Hz
Zarlink Semiconductor Inc.
100Hz
MT9074
18
1.0kHz 10kHz 100kHz
2.4 kHz 18 kHz 100 kHz
Tolerance
MT9074
Jitter Frequency
Jitter Frequency
(log scale)
(log scale)
Data Sheet
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