zl50064 Zarlink Semiconductor, zl50064 Datasheet - Page 6

• Manufacturer Part Number: zl50064
• Description: 16 K Channel Digital Switch With High Jitter Tolerance, Single Rate 2, 4, 8 Or 16 Mbps And 64 Input And 64 Output Streams
• Manufacturer: Zarlink Semiconductor

Figure 1 - ZL50062/4 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2 - ZL50064 LQFP Connections (256 LQFP, 28mm x 28mm) Pin Diagram
Figure 3 - ZL50062 PBGA Connections (256 PBGA, 17mm x 17mm) Pin Diagram
Figure 4 - 16,384 x 16,384 Channels (16Mbps), Unidirectional Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 5 - 8,192 x 8,192 Channels (16Mbps), Bi-directional Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 6 - 12,288 by 4,096 Channels Blocking Bi-directional Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 7 - ST-BUS and GCI-Bus Input Timing Diagram for Different Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 8 - Input and Output Frame Pulse Alignment for Different Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 9 - Backplane and Local Input Bit Delay Timing Diagram for Data Rate of 16Mbps. . . . . . . . . . . . . . . . . . 24
Figure 10 - Backplane and Local Input Bit Delay or Sampling Point Selection Timing Diagram for Data Rate of
Figure 11 - Local and Backplane Output Advancement Timing Diagram for Data Rate of 16Mbps . . . . . . . . . . . 26
Figure 12 - Data Throughput Delay with Input Ch0 Switched to Output Ch0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 13 - Data Throughput Delay with Input Ch0 Switched to Output Ch13. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 14 - Data Throughput Delay with Input Ch13 Switched to Output Ch0. . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 15 - Hardware RESET De-assertion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 16 - Frame Boundary Conditions, ST-BUS Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 17 - Frame Boundary Conditions, GCI-Bus Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 18 - Input and Output Clock Timing Diagram for ST-BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 19 - Input and Output Clock Timing Diagram for GCI-Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 20 - ST-BUS Local/Backplane Data Timing Diagram (8Mbps, 4Mbps, 2Mbps) . . . . . . . . . . . . . . . . . . . . . 57
Figure 21 - ST-BUS Local/Backplane Data Timing Diagram (16Mbps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 22 - GCI-Bus Local/Backplane Data Timing Diagram (8Mbps, 4Mbps, 2Mbps) . . . . . . . . . . . . . . . . . . . . . 59
Figure 23 - GCI-Bus Local/Backplane Data Timing Diagram (16Mbps). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 24 - Serial Output and External Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 25 - Output Driver Enable (ODE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 26 - Motorola Non-Multiplexed Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 27 - JTAG Test Port Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
(as viewed through top of package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
(as viewed through top of package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
8Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
List of Figures
Zarlink Semiconductor Inc.
ZL50062/4
6
Data Sheet