zl50031 Zarlink Semiconductor, zl50031 Datasheet - Page 11

• Manufacturer Part Number: zl50031
• Description: Flexible 4 K X 2 K Channel Digital Switch With H.110 Interface And 2 K X 2 K Local Switch
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
126,127,128,129,
118,157,158,165,
205,206,213,214,
50,51,52,53,121,
130,131,132,133
25,38,39,40,47,
256 Pin HQFP
122,123,124,
166,173,174,
221,222,227,
26,27,28,29,
32,33,34,35,
189 to196
80 to 87,
90 to 93,
181,182,
228,232
41,42,
154
24
20
22
23
21
IC_OPEN
IC_GND
PCI_OE
Name
TRST
TCK
TMS
TDo
TDi
NC
PCI Output Enable (3.3 V Tolerant Input). This active low input is the
control signal used to tristate the BSTio0 - 31 pins during hot-swapping.
During normal operation this signal should be low.
Internal Connection. These pins MUST be connected to ground for
normal operation.
Internal Connection. These pins MUST be left open for normal operation.
No Connection. These pins MUST be left unconnected for normal
operation.
Test Serial Data In (3.3 V Input with Internal pull-up). JTAG serial test
instructions and data are shifted in on this pin. This pin is pulled high by an
internal pull-up when not driven.
Test Serial Data Out (3.3 V Tolerant Tri-state Output). JTAG serial data is
output on this pin on the falling edge of TCK. This pin is held in high
impedance state when JTAG is not enabled.
Test Clock (5 V Tolerant Input). Provides the clock to the JTAG test logic.
This pin should be low when JTAG is not enabled.
Test Reset (3.3 V Input with Internal pull-up). Asynchronosly initializes the
JTAG TAP Controller by putting it in the Test-Logic-Reset state. This pin
should be pulled low to ensure that the ZL50031 is in normal functional
mode.
Test Mode Select (5 V Tolerant Input with Enabled Internal Pull-up):
JTAG signal that controls the state transitions of the TAP controller. This pin
is pulled high by an internal pull-up resistor when it is not driven.
Zarlink Semiconductor Inc.
ZL50031
11
Description
Data Sheet