zl50031 Zarlink Semiconductor, zl50031 Datasheet - Page 49

• Manufacturer Part Number: zl50031
• Description: Flexible 4 K X 2 K Channel Digital Switch With H.110 Interface And 2 K X 2 K Local Switch
• Manufacturer: Zarlink Semiconductor

* Note 1: It is assumed that the switching among references is done by external software control, if the External Mode is
selected.
BEN (bit 14)
AEN (bit 13)
RPS (bit 12)
FS1-0
(bits 11-10)
Frequency of the
secondary
reference
FP1-0
(bits 9-8)
Frequency of the
primary
reference
SS3-0
(bits 7-4)
Secondary
reference
selection:
FDM1, FDM0
(bits 9-8)
Failure detect
mode selection
MRST (bit 10)
Table 21 - ZL50031 Mode Selection - By Programming DOM1 and DOM2 Registers
reference
selection:
(bits 3-0)
Primary
SP3-0
Bit
0 - Monitor “B Clocks”
1 - Drive “A Clocks”
0 - Preferred reference is
PRI_REF
00 - 8 kHz
01 - 1.544 MHz
10 - 2.048 MHz
00 - 8 kHz
01 - 1.544 MHz
10 - 2.048 MHz
0000 - CTREF1
0001 - CTREF2
1000 - LREF0
1001 - LREF1
1010 - LREF2
1011 - LREF3
0000 - CTREF1
0001 - CTREF2
1000 - LREF0
1001 - LREF1
1010 - LREF2
1011 - LREF3
0 - MTIE functional
1 - MTIE reset
00 - Autodetect Mode
Primary Master
Mode
Zarlink Semiconductor Inc.
ZL50031
1 - Drive “B Clocks”
0 - Monitor “A Clocks”
0 - Preferred reference is
PRI_REF
00 - 8 kHz
01 - 1.544 MHz
10 - 2.048 MHz
11 - 8.192 MHz Clock
0000 - CTREF1
0001 - CTREF2
1000 - LREF0
1001 - LREF1
1010 - LREF2
1011 - LREF3
XXXX - C8_A_io
When bits FP1-0 are set to 11,
C8_A_io is always used as the
primary reference, regardless
of the values of bits SP3-0.
Output frame pulses are
aligned to FRAME_A_io if
primary reference is the active
reference
0 - MTIE functional
1 - MTIE reset
00 - Autodetect Mode
01 - External Mode
(Note 1)
Secondary Master Mode
49
(“A Clocks”)
0 - Monitor “B Clocks”
0 - Monitor “A Clocks”
0 - Preferred reference is
PRI_REF
11
(“B Clocks”)
11 - 8.192 MHz Clock
XXXX - C8_B_io
When bits FS1-0 are set to 11,
C8_B_io is always used as the
secondary reference,
regardless of the values of bits
SS3-0. Output frame pulses
are aligned to FRAME_B_io if
secondary reference is the
active reference
XXXX - C8_A_io
When bits FP1-0 are set to 11,
C8_A_io is always used as the
primary reference, regardless
of the values of bits SP3-0.
Output frame pulses are
aligned to FRAME_A_io if
primary reference is the active
reference
1 - MTIE MUST be kept in the
reset state in Slave mode
00 - Autodetect Mode
01 - External Mode
(Note 1)
-
8.192 MHz Clock
Slave Mode
(“A Clocks”)
Data Sheet