am79d2251 Advanced Micro Devices, am79d2251 Datasheet - Page 30
am79d2251
Manufacturer Part Number
am79d2251
Description
Dual Intelligent Subscriber Line Audio-processing Circuit Islac
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79D2251.pdf
(35 pages)
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GCI Timing Specifications
30
PCLK
TSCA
DXA
DRA
FS
Figure 19. PCM Highway Timing for XE = 1 (Transmit on Positive PCLK Edge)
Notes:
1. The Data Clock (DCL) can be stopped in the high or low state without loss of information.
2. A temporary stoppage of DCL must not put the ISLAC into a state in which it does not respond to a software
3. All frequency-dependent specifications are guaranteed for clock frequencies within ±100 PPM from
V
V
IH
Symbol
t
reset command.
nominal.
IL
WH
t
t
t
t
t
t
R
R
WFH
DDC
t
DCL
t
t
DDF
t
27
HD
SF
HF
SD
, t
, t
, t
F
F
WL
28
26
24
Signal
DCL
DCL
DCL
DU
DU
DD
DD
31
FS
FS
FS
FS
First
Bit
23
29
V
Rise/fall time
Period, F
F
Pulse width
Rise/fall time
Setup time
Hold time
High pulse width
Delay from DCL edge
Delay from FS edge
Data setup
Data hold
V
OH
DCL
OL
First
25
Bit
= 4096 kHz
22
34
Am79D2251
DCL
Time Slot Zero, Clock Slot Zero
Parameter
32
Second
V
V
IH
IL
Bit
= 2048 kHz
35
twH+20
Min
478
239
130
90
70
50
50
Typ
t
DCL
Max
498
249
100
150
60
60
30
–50
33
See Note 4
Unit
ns
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