mh1020 Music Semiconductors, Inc., mh1020 Datasheet - Page 24
mh1020
Manufacturer Part Number
mh1020
Description
Hla Packaged Asynchronous Data Recognition And Recall Processor
Manufacturer
Music Semiconductors, Inc.
Datasheet
1.MH1020.pdf
(31 pages)
REGISTER BIT ASSIGNMENTS
Control Register Bits
Note: D15 reads back as 0.
Segment Control Register Bits
Note: D15, D10, D5, and D2 are read back as 0s.
Bit(s)
Bit(s)
14:13
12:11
14:13
12:11
10:9
8:6
5:4
3:2
1:0
9:8
7:6
4:3
1:0
15
15
10
5
2
Name
SDL
DCSL
DCEL
SSL
SCSL
SCEL
LDC
DSCV
LSC
SSCV
Name
RST
Match Flag
Full Flag
Translation
CAM/RAM Part
Comp. Mask
AR Inc/Dec
Mode
Description
0 = Set Destination Segment Limits
1 = No Change
00–11 = Destination Count Start Limit
00–11 = Destination Count End Limit
0 = Set Source Segment Limits
1 = No Change
00–11 = Source Count Start Limit
00–11 = Source Count End Limit
0 = Load Destination Segment Count
1 = No Change
00–11 = Destination Seg. Count Value
0 = Load Source Segment Count
1 = No Change
00–11 = Source Segment Count Value
Description
0 = Reset
00 = Enable
01 = Disable
10 = Reserved
11 = No Change
00 = Enable
01 = Disable
10 = Reserved
11 = No Change
00 = Input Not Translated
01 = Input Translated
10 = Reserved
11 = No Change
000 = 64 CAM/0 RAM
001 = 48 CAM/16 RAM
010 = 32 CAM/32 RAM
011 = 16 CAM/48 RAM
100 = 48 RAM/16 CAM
101 = 32 RAM/32 CAM
110 = 16 RAM/48 CAM
111 = No Change
00 = None
01 = MR1
10 = MR2
11 = No Change
00 = Increment
01 = Decrement
10 = Disable
11 = No Change
00 = Standard
01 = Enhanced
10 = Reserved
11 = No Change
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