mh1020 Music Semiconductors, Inc., mh1020 Datasheet - Page 3

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mh1020

Manufacturer Part Number
mh1020
Description
Hla Packaged Asynchronous Data Recognition And Recall Processor
Manufacturer
Music Semiconductors, Inc.
Datasheet
PIN DESCRIPTIONS
Note: All signals are implemented in CMOS technology with TTL levels. Signal names that start with a slash (“/”) are active LOW.
Inputs should never be left floating. The CAM architecture draws large currents during compare operations, mandating the use of good
layout and bypassing techniques. Refer to the DC Electrical Characteristics on page 26 for more information.
/E (Chip Enable, Input, TTL)
The /E input enables the device while LOW. The falling
edge registers the control signals /W, /CM, and /EC. The
rising edge locks the daisy chain, turns off the DQ pins,
and clocks the Destination and Source Segment counters.
Rev. 1
W
G
M
A
B
C
D
E
H
K
N
P
R
U
V
Y
F
L
T
J
MH1020 top view
GND
DQ4
DQ5
VCC
VCC
GND
GND
GND
GND
DQ6
DQ7
VCC
nc
nc
1
= nc
Figure 2: MH1020 High Density Leadless Array (HLA) pinout
2
GND GND DQ8 DQ9 DQ10 DQ11 GND
3
VCC
4
DQ3
5
DQ2
6
7
DQ1
8
DQ0
9
3
10
nc
The four cycle types enabled by /E are shown in Table 1.
Table 1: I/O Cycles
GND
GND DQ12 DQ13
11
HIGH
HIGH
LOW
LOW
GND
12
/W
/EC
13
/CM
14
nc
DQ14 DQ15 GND GND
15
nc
HIGH
HIGH
LOW
LOW
/CM
16
/FI
/FF
17
/MM
18
Cycle Type
Command Write Cycle
Data Write Cycle
Command Read Cycle
Data Read Cycle
19
/RESET
GND
GND
VCC
VCC
GND
GND
MA
MF
20
MI
/W
nc
/E

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