hi-3111pstf Holt Integrated Circuits, Inc., hi-3111pstf Datasheet - Page 28

• Manufacturer Part Number: hi-3111pstf
• Description: Avionics Can Controller With Integrated Transceiver
• Manufacturer: Holt Integrated Circuits, Inc.

Setting bits in the General Purpose Pins Enable Register allows the user to reflect the values of the Interrupt Flag bits in the INTF
Register or the Status Flag bits in the STATF Register on the GP1 andGP2 pins.
Bit Name
7-4 GPINE7:43:0
3-0 GPINE3:0
GENERAL PURPOSE PINS ENABLE REGISTER: GPINE
(Write, SPI Op-code 0x22)
(Read, SPI Op-code 0xE8)
R/W
R/W
R/W
Default Description
0000
0000
Reflect status of interrupt flag bits in INTF or status flag bits in STATF on GP2 pin as follows:
Reflect status of interrupt flag bits in INTF or status flag bits in STATF on GP1 pin as follow:
0000: GP2 pin is asserted when F0MESS bit is set in register INTF.
0001: GP2 pin is asserted when F1MESS bit is set in register INTF.
0010: GP2 pin is asserted when WAKEUP bit is set in register INTF.
0011: GP2 pin is asserted when MCHG bit is set in register INTF.
0100: GP2 pin is asserted when BUSERR bit is set in register INTF.
0101: GP2 pin is asserted when TXCPLT bit is set in register INTF.
0110: GP2 pin is asserted when RXFIFO bit is set in register INTF.
0111: GP2 pin is asserted when RXTMP bit is set in register INTF.
1000: GP2 pin is asserted when RXFFULL bit is set in register STATF.
1001: GP2 pin is asserted when RXFMPTY bit is set in register STATF.
1010: GP2 pin is asserted when BUSOFF bit is set in register STATF.
1011: GP2 pin is asserted when ERRP bit is set in register STATF.
1100: GP2 pin is asserted when ERRW bit is set in register STATF.
1101: GP2 pin is asserted when TXHISF bit is set in register STATF.
1110: GP2 pin is asserted when TXFULL bit is set in register STATF.
1111: GP2 pin is asserted when TXMPTY bit is set in register STATF.
0000: GP1 pin is asserted when F0MESS bit is set in register INTF.
0001: GP1 pin is asserted when F1MESS bit is set in register INTF.
0010: GP1 pin is asserted when WAKEUP bit is set in register INTF.
0011: GP1 pin is asserted when MCHG bit is set in register INTF.
0100: GP1 pin is asserted when BUSERR bit is set in register INTF.
0101: GP1 pin is asserted when TXCPLT bit is set in register INTF.
0110: GP1 pin is asserted when RXFIFO bit is set in register INTF.
0111: GP1 pin is asserted when RXTMP bit is set in register INTF.
1000: GP1 pin is asserted when RXFFULL bit is set in register STATF.
1001: GP1 pin is asserted when RXFMPTY bit is set in register STATF.
1010: GP1 pin is asserted when BUSOFF bit is set in register STATF.
1011: GP1 pin is asserted when ERRP bit is set in register STATF.
1100: GP1 pin is asserted when ERRW bit is set in register STATF.
1101: GP1 pin is asserted when TXHISF bit is set in register STATF.
1110: GP1 pin is asserted when TXFULL bit is set in register STATF.
1111: GP1 pin is asserted when TXMPTY bit is set in register STATF.
HOLT INTEGRATED CIRCUITS
HI-3110
MSB
7
GPINE7:4
28
6
5
4
3
GPINE3:0
2
1
LSB
0