am49lv6408m Meet Spansion Inc., am49lv6408m Datasheet - Page 3

• Manufacturer Part Number: am49lv6408m
• Description: Stacked Multi-chip Mcp 64 Mbit 4 M ? 16 Bit Flash Memory And 8 Mbit 512k ? 16 Bit Pseudo Static Ram
• Manufacturer: Meet Spansion Inc.

Am49LV6408M
Stacked Multi-chip Package (MCP) 64 Mbit (4 M x 16 bit) Flash Memory and 8
Mbit (512K x 16-Bit) pseudo Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
Flash Memory Features
ARCHITECTURAL ADVANTAGES
PERFORMANCE CHARACTERISTICS
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Power supply voltage of 2.7 to 3.3 volt
High Performance
— Access time as fast as 100ns initial 5 ns page Flash
Package
— 69-Ball FBGA
— Look ahead pinout for simple migration
— 8 x 10 x 1.2 mm
Operating Temperature
— –40
Single power supply operation
— 3 V for read, erase, and program operations
Manufactured on 0.23 µm MirrorBit process
technology
SecSi™ (Secured Silicon) Sector region
— 128-word sector for permanent, secure identification
— May be programmed and locked at the factory or by
Flexible sector architecture
— One hundred twenty seven 32 Kword sectors
— Eight 4 Kword boot sectors
Compatibility with JEDEC standards
— Provides pinout and software compatibility for
Minimum 100,000 erase cycle guarantee per sector
20-year data retention at 125°C
High performance
— 100 ns access time
— 35 ns page read times
— 0.5 s typical sector erase time
— 22 µs typical write buffer word programming time:
ADVANCE INFORMATION
55 ns pSRAM
through an 8-word random Electronic Serial Number,
accessible through a command sequence
the customer
single-power supply flash, and superior inadvertent
write protection
16-word write buffer reduces overall programming
time for multiple-word updates
°
C to +85
°
C
Refer to AMD’s Website (www.amd.com) for the latest information.
SOFTWARE & HARDWARE FEATURES
pSRAM Features
— 4-word page read buffer
— 16-word write buffer
Low power consumption (typical values at 3.0 V, 5
MHz)
— 30 mA typical initial Page read current; 10 mA typical
— 50 mA typical erase/program current
— 1 µA typical standby mode current
Software features
— Program Suspend & Resume: read other sectors
— Erase Suspend & Resume: read/program other
— Data# polling & toggle bits provide status
— Unlock Bypass Program command reduces overall
— CFI (Common Flash Interface) compliant: allows host
Hardware features
— Sector Group Protection: hardware-level method of
— Temporary Sector Unprotect: V
— WP#/ACC input:
— Hardware reset input (RESET#) resets device
As fast as 55ns access time
Power dissipation
— Operating: 23 mA maximum
— Standby: 60 µA maximum at 3.0 V
CE1ps# and CE2ps Chip Select
Power down features using CE1ps# and CE2ps
Data retention supply voltage: 1.5 to 3.3 volt
Byte data control: LB#s (DQ7–DQ0),
UB#s (DQ15–DQ8)
intra-Page read current
before programming operation is completed
sectors before an erase operation is completed
multiple-word programming time
system to identify and accommodate multiple flash
devices
preventing write operations within a sector group
changing code in locked sectors
Write Protect input (WP#) protects top or bottom two
sectors regardless of sector protection settings
ACC (high voltage) accelerates programming time for
higher throughput during system production
Publication# 30918
Issue Date: November 5, 2003
ID
-level method of
Rev: A Amendment/0