lrs1386 Sharp Microelectronics of the Americas, lrs1386 Datasheet - Page 38
lrs1386
Manufacturer Part Number
lrs1386
Description
Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1386.pdf
(114 pages)
- Current page: 38 of 114
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17. Design Considerations
18. Related Document Information
Note:
1. International customers should contact their local SHARP or distribution sales offices.
1. Power Supply Decoupling
2. F-V
3. The Inhibition of Overwrite Operation
4. Power Supply
To avoid a bad effect to the system by flash memory power switching characteristics, each device should have a 0.1µF
ceramic capacitor connected between its F-V
Low inductance capacitors should be placed as close as possible to package leads.
Updating the memory contents of flash memories that reside in the target system requires that the printed circuit board
designer pay attention to the F-V
V
Please do not execute reprograming “0” for the bit which has already been programed “0”. Overwrite operation may
generate unerasable bit.
In case of reprograming “0” to the data which has been programed “1”.
For example, changing data from “1011110110111101” to “1010110110111100”
requires “1110111111111110” programing.
Block erase, full chip erase, word write and lock-bit configuration with an invalid F-V
(See Chapter 11. DC Electrical Characteristics) produce spurious results and should not be attempted.
Device operations at invalid F-V
and should not be attempted.
CC
PP
• Program “0” for the bit in which you want to change data from “1” to “0”.
• Program “1” for the bit which has already been programed “0”.
power bus.
Trace on Printed Circuit Boards
Document No.
FUM00701
(1)
PP
CC
Power Supply trace. Use similar trace widths and layout considerations given to the F-
LH28F320BX, LH28F640BX Series Appendix
voltage (See Chapter 11. DC Electrical Characteristics) produce spurious results
CC
and GND and between its F-V
L R S1 3 8 6
Document Name
PP
and GND.
PP
36
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