lrs1386 Sharp Microelectronics of the Americas, lrs1386 Datasheet - Page 81
lrs1386
Manufacturer Part Number
lrs1386
Description
Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1386.pdf
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Appendix to Spec No.: MFM2-J13302
Figure 8.1. Automated Page Buffer Program Flowchart
FUM00701
Model No.: LRS1386
1. Word count values on DQ
2. Write Buffer contents will be programmed at the start
3. Align the start address on a Write Buffer boundary for
4. The device aborts the Page Buffer Program command
5. The Status Register indicates an “improper command
(Note 2, 3)
(Note 4, 5)
Operation
(Note 1)
Standby
Standby
register.
address.
maximum programming performance.
if the current address is outside of the original block
address.
sequence” if the Page Buffer Program command is
aborted. Follow this with a Clear Status Register
command.
SR full status check can be done after each page buffer
program, or after a sequence of page buffer programs.
Write FFH after the last page buffer program operation
to place device in read array mode.
Write
Write
Write
Write
Write
Read
Read
Bus
Page Buffer
Page Buffer
Command
Program
Program
March 2, 2001
<First cycle>
Data=E8H
Addr=Start Address
Extended Status Register
Data
Check XSR.7
1=Page Buffer Program
Ready
0=Page Buffer Program
Busy
<Second cycle>
Data=[Word Count N]-1
Addr=Start Address
<Third cycle>
Data=Buffer Data
Addr=Start Address
<(N+2)th cycle>
Data=Buffer Data
Addr=Sequential Address
following start address
<(N+3)th cycle>
Data=D0H
Addr=Within Partition
Status Register Data
Addr=Within Partition
Check SR.7
1=WSM Ready
0=WSM Busy
0-7
are loaded into count
Comments
Rev. 2.20
35
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