lrs1383 Sharp Microelectronics of the Americas, lrs1383 Datasheet - Page 23

• Manufacturer Part Number: lrs1383
• Description: Stacked Chip 32m Flash And 8m Sram
• Manufacturer: Sharp Microelectronics of the Americas

12.3 Write Cycle (F-WE / F-CE Controlled)
Notes:
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WHEH
DVWH
WHDX
WHAX
WHWL
VVWH
WLWH
AVWH
WHGL
1. The timing characteristics for reading the status register during block erase, full chip erase, (page buffer) program and OTP
2. A write operation can be initiated and terminated with either F-CE or F-WE.
3. Sampled, not 100% tested.
4. Write pulse width (t
5. Write pulse width high (t
6. F-V
7. t
8. See 5.1 Command Definitions for valid address and data for block erase, full chip erase, (page buffer) program, OTP
ELWL
SHWH
WHRL
PHWL
WHR0
Symbol
t
t
program operations are the same as during read-only operations. See the AC Characteristics for read cycle.
F-CE or F-WE (whichever goes high first). Hence, t
edge of F-CE or F-WE (whichever goes low last). Hence, t
program success (SR.1/3/4/5=0).
program or lock bit configuration.
QVVL
QVSL
WHR0
(t
(t
(t
(t
(t
(t
(t
(t
(t
(t
(t
(t
(t
(t
WLEL
EHWH
PP
PHEL
DVEH
AVEH
EHDX
EHAX
SHEH
VVEH
EHGL
EHR0
EHRL
ELEH
EHEL
should be held at F-V
(t
EHR0
)
)
) F-CE (F-WE) Setup to F-WE (F-CE) Going Low
) F-WE (F-CE) Pulse Width
) Address Setup to F-WE (F-CE) Going High
) F-WP High Setup to F-WE (F-CE) Going High
) Write Recovery before Read
) F-WE (F-CE) High to F-RY/BY Going Low
) F-WE (F-CE) Pulse Width High
) Data Setup to F-WE (F-CE) Going High
) Data Hold from F-WE (F-CE) High
) Address Hold from F-WE (F-CE) High
) F-V
) F-CE (F-WE) Hold from F-WE (F-CE) High
F-RST High Recovery to F-WE (F-CE) Going Low
F-WP High Hold from Valid SRD, F-RY/BY High - Z
F-V
F-WE (F-CE) High to SR.7 Going "0"
) after the Read Query or Read Identifier Codes/OTP command=t
PP
PP
Setup to F-WE (F-CE) Going High
Hold from Valid SRD, F-RY/BY High - Z
WP
) is defined from the falling edge of F-CE or F-WE (whichever goes low last) to the rising edge of
WPH
PP
) is defined from the rising edge of F-CE or F-WE (whichever goes high first) to the falling
=V
PPH1/2
(1,2)
Parameter
until determination of block erase, full chip erase, (page buffer) program or OTP
L R S1 3 8 3
WP
=t
WLWH
WPH
=t
=t
WHWL
ELEH
=t
=t
WLEH
EHEL
(T
A
=t
=t
AVQV
= -25°C to +85°C, F-V
ELWH
WHEL
Notes
3, 6
3, 6
3, 7
3
4
8
8
5
3
3
3
4
+100ns.
.
=t
EHWL
Min.
150
200
60
30
30
40
50
0
0
0
0
0
0
0
.
t
AVQV
Max.
CC
100
= 2.7V to 3.3V)
+40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21