smc256af Numonyx, smc256af Datasheet - Page 16

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smc256af

Manufacturer Part Number
smc256af
Description
32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte And 512 Mbyte 3.3 V / 5 V Supply Compactflash? Card
Manufacturer
Numonyx
Datasheet
Electrical interface
Table 9.
16/82
A10 to A0
(PC card memory mode)
A10 to A0
(PC card I/O mode)
A2 to A0
(True IDE mode)
BVD1
(PC card memory mode)
–STSCHG
(PC card I/O mode)
–PDIAG
(True IDE mode)
BVD2
(PC card memory mode)
–SPKR
(PC card I/O mode)
–DASP
(True IDE mode)
D15-D00
(PC card memory mode)
D15-D00
(PC card I/O mode)
D15-D00
(True IDE mode)
GND
(PC card memory mode)
GND
(PC card I/O mode)
GND
(True IDE mode)
–INPACK
(PC card memory mode)
–INPACK
(PC card I/O mode)
Reserved
(True IDE mode)
Signal name
Signal description
I
I/O
I/O
I/O
O
Direction
8,10,11,12,
14,15,16,17,
18,19,20
46
45
31,30,29,28,
27,49,48,47,
6,5,4,3,2,
23,22,21
1,50
43
Pin
Used (with –REG) to select: the I/O Port Address
registers, the memory mapped Port Address registers, a
byte in the card's information structure and its
Configuration Control and Status registers.
Same as PC card memory mode.
Only A2 to A0 are used to select the one of eight registers
in the task file, the remaining lines should be grounded.
The battery voltage status of the card, as no battery is
required it is asserted High.
Alerts the host to changes in the READY and Write
Protect states. Its use is controlled by the Card
Configuration and Status register.
The Pass Diagnostic signal in the master/slave handshake
protocol.
The battery voltage status of the card, as no battery is
required it is asserted High.
The binary audio output from the card. It is asserted High
as audio functions are not supported.
This input/output is the disk active/slave present signal in
the master/slave handshake protocol.
Carry the data, commands and status information
between the host and the controller. D00 is the LSB of the
even byte of the word. D08 is the LSB of the odd byte of
the word.
Same as PC card memory mode.
All task file operations occur in byte mode on D00 to D07
while all data transfers are 16 bit using D00 to D15.
Ground.
Same for all modes.
Same for all modes.
Not used, should not be connected to the host.
The Input Acknowledge is asserted when the Card is
selected and responding to an I/O read cycle at the
current address on the bus. It is used by the host to control
the enable of any input data buffers between the Card and
CPU.
Not used, should not be connected to the host.
Description
SMCxxxAF

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