smc256af Numonyx, smc256af Datasheet - Page 32

• Manufacturer Part Number: smc256af
• Description: 32 Mbyte, 64 Mbyte, 128 Mbyte, 256 Mbyte And 512 Mbyte 3.3 V / 5 V Supply Compactflash? Card
• Manufacturer: Numonyx

Card configuration
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
32/82
Card Configuration and Status register (base + 02h in
attribute memory)
The Card Configuration and Status register contains information about the card’s status
(see
Changed
Indicates that one or both of the pin replacement register (CRDY, or CWProt) bits are set to
‘1’. When the Changed bit is set,
the card is configured for the I/O interface.
SigChg
This bit is set and reset by the host to enable and disable a state-change signal from the
Status register (issued on Status Changed pin 46). If no state change signal is desired, this
bit should be set ‘0’ and pin 46 (
I/O.
IOis8
The host sets this bit to ‘1’ if the card is to be configured in 8 bit I/O mode. The card is
always configured for both 8 and 16 bit I/O, so this bit is ignored.
PwrDwn
This bit indicates whether the card is in the power saving mode or active mode. When the
PwrDwn bit is set to ‘1’, the card enters power-down mode. When set to ‘0’, the card enters
active mode. The READY value on Pin Replacement register becomes BUSY when this bit
is changed. READY will not become Ready until the power state requested has been
entered. The card automatically powers down when it is idle and powers back up when it
receives a command.
Int
This bit represents the internal state of the interrupt request. It is available whether or not
the I/O interface has been configured. It remains valid until the condition which caused the
interrupt request has been serviced. If interrupts are disabled by the
Control register, this bit is ‘0’.
Table 27.
Operation
Read
Write
Table
27).
Card Configuration and Status register (default value: 00h)
Changed
D7
0
SigChg
SigChg
D6
–
STSCHG) will be held High while the card is configured for
–
STSCHG (pin 46) is held Low and if the SigChg bit is ‘1’
IOIS8
IOIS8
D5
D4
0
0
D3
0
0
PwrDwn
PwrDwn
D2
–
IEN bit in the Device
D1
Int
0
SMCxxxAF
D0
0
0