mt8vddt3264hg-265 Micron Semiconductor Products, mt8vddt3264hg-265 Datasheet - Page 11

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mt8vddt3264hg-265

Manufacturer Part Number
mt8vddt3264hg-265
Description
128mb, 256mb, 512mb X64, Sr 200-pin Ddr Sdram Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 11:
PDF: 09005aef8092973f/Source: 09005aef80921669
DD8C16_32_64x64H.fm - Rev. C 10/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 4;
t
control inputs changing once per clock cycle
Precharge power-down standby current: All device banks
idle; Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; V
Active power-down standby current: One device bank
active; Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device
bank active;
DQS inputs changing twice per clock cycle; Address and other
control inputs changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads;
One device bank active; Address and control inputs changing
once per clock cycle;
Operating burst write current: BL = 2; Continuos burst writes;
One device bank active; Address and control inputs changing
once per clock cycle;
changing twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank active interleave read current: Four device
bank interleaving reads; BL = 4 with auto precharge;
t
change only during active READ or WRITE commands
RC =
RC =
CK =
RC =
t
t
t
t
RC (MIN);
RC (MIN);
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control inputs
t
RC =
I
Values are shown for the MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
DD
t
t
t
CK =
CK =
CK =
Specifications and Conditions – 256MB
t
RAS (MAX);
t
t
CK =
CK =
t
t
t
CK (MIN); DQ, DM, and DQS inputs
CK (MIN); I
CK (MIN); Address and control inputs
t
CK =
t
t
t
CK (MIN); I
CK (MIN); DQ, DM, and DQS inputs
CK =
t
IN
t
CK (MIN); CKE = LOW
CK =
t
= V
OUT
CK (MIN); CKE = LOW
128MB, 256MB, 512MB (x64, SR) 200-Pin DDR SDRAM SODIMM
REF
t
CK (MIN); DQ, DM, and
= 0mA; Address and
OUT
for DQ, DM, and DQS
= 0mA
t
t
REFC =
REFC = 7.8125µs
t
RFC (MIN)
11
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
I
I
I
DD
DD
DD
DD
DD
DD
DD
DD
4W
3N
5A
4R
2P
2F
3P
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
1
5
6
7
1,080
1,360
1,600
1,560
2,080
3,760
-40B
480
320
560
32
48
32
1,000
1,360
1,400
1,400
2,040
3,280
-335
400
240
480
32
48
32
Electrical Specifications
1,000
1,280
1,200
1,200
1,880
2,800
-262
360
200
400
32
32
48
©2004 Micron Technology, Inc. All rights reserved.
1,160
1,200
1,200
1,880
2,800
-26A
960
360
200
400
32
48
32
1,160
1,200
1,200
1,960
2,920
-265
960
360
240
400
32
48
32
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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