mt16vddf6464hy-26a Micron Semiconductor Products, mt16vddf6464hy-26a Datasheet - Page 14

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mt16vddf6464hy-26a

Manufacturer Part Number
mt16vddf6464hy-26a
Description
512mb, 1gb X64 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 12: I
Notes: 1–5, 8, 10, 12, 48; DDR SDRAM devices only; notes appear on pages 20–23; 0°C £ T
09005aef80a646bc
DDF16C64_128x64HG_B.fm - Rev. B 7/03 EN
PARAMETER/CONDITION
NOTE:
OPERATING CURRENT: One device bank; Active-
Precharge;
DQS inputs changing once per clock cycle; Address and
control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active-Read-
Precharge; Burst = 4;
I
per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All
device banks idle; Power-down mode;
CKE = (LOW)
IDLE STANDBY CURRENT: CS# = HIGH; All device banks
are idle;
control inputs changing once per clock
for DQ, DQS, and DM
ACTIVE POWER-DOWN STANDBY CURRENT: One device
bank active; Power-down mode;
CKE = LOW
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH;
One device bank active
(MIN); DQ, DM and DQS inputs changing twice per clock
cycle; Address and other control inputs changing once per
clock cycle
OPERATING CURRENT: Burst = 2;
burst; One device bank active; Address and control inputs
changing once per clock cycle;
0mA
OPERATING CURRENT: Burst = 2; Writes; Continuous
burst; One device bank
inputs changing once per clock cycle;
DM, and DQS inputs changing twice per clock cycle
AUTO REFRESH BURST CURRENT:
SELF REFRESH CURRENT: CKE £ 0.2V
OPERATING CURRENT: Four device bank interleaving
READs
t
change only during Active READ, or WRITE commands
OUT
RC allowed;
a - Value calculated as one module rank in this operating condition, and all other module ranks in I
b - Value calculated reflects all module ranks in this operating condition.
= 0mA; Address and control inputs
(Burst = 4) with auto precharge,
t
CK =
t
RC =
t
CK =
t
DD
CK (MIN);
t
RC (MIN);
t
CK (MIN); Address and control inputs
Specifications and Conditions – 512MB
t
RC =
;
t
active; Address and control
RC =
CKE = HIGH; Address and other
t
t
RC (MIN);
CK =
t
t
RAS (MAX);
CK =
Reads; Continuous
t
t
CK (MIN); DQ, DM and
CK =
t
CK (MIN);
t
CK =
cycle. V
t
t
CK =
t
t
RC = minimum
CK =
CK (MIN);
changing once
t
(MIN)
7.8125µs
t
t
RC =
CK =
CK (MIN); DQ,
t
CK (MIN);
t
IN
CK (MIN);
I
OUT
t
t
t
RFC
= V
CK
RFC =
=
REF
14
I
I
I
I
I
I
I
I
I
I
DD4W
SYM
I
I
DD3N
DD2P
DD2F
DD3P
DD4R
DD5A
DD5
DD6
DD7
DD0
DD1
b
a
a
b
b
b
a
b
b
a
b
a
1,032
1,392
1,432
1,272
4,080
3,272
Micron Technology, Inc., reserves the right to change products or specifications without notice.
-335
800
480
960
64
96
64
1,032
1,312
1,232
1,112
3,760
2,832
-262
720
400
800
64
96
64
200-PIN DDR SODIMM
MAX
A
£ +70°C; V
-26A/-
512MB, 1GB (x64)
1,192
1,232
1,122
3,760
2,832
265
872
720
400
800
64
96
64
DD
DD
1,272
1,432
1,552
3,920
2,952
-202
992
720
480
800
64
96
64
, V
2p (CKE LOW) mode.
DD
©2003 Micron Technology, Inc.
Q = +2.5V ±0.2V
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
S
21, 28,
21, 28,
NOTE
20, 42
20, 42
20, 42
20, 44
24, 44
20, 43
44
45
44
41
20
S
9

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